General Computer Science 320201 GenCS I & II Lecture ... - Kwarc

to access them by some fixed regime, e.g. one after the other, in sequence (hence the name random
access memory: RAM). We address the Program store by a function P : N → B 2n . The data store
is also RAM, but a sequence or n-bit cells, which is addressed by the function P : N → B n .
The value of the program counter is interpreted as a binary number that addresses a 2n-bit cell
in the program store. The accumulator is the register that contains one of the inputs to the ALU
before the operation (the other is given as the argument of the program instruction); the result of
the ALU is stored in the accumulator after the instruction is carried out.
Memory Plan of a Register Machine
Program Store
3
2
1
P
r
o
g
r
a
m
0 Operation Argument
2n−bit Cells
Addresses
CPU
ACC (accumulator)
IN1 (index register 1)
IN2 (index register 2)
PC (program counter)
load
save
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3
2
1
0
Data Store
n−bit Cells
Addresses
The ALU and the MMU are control circuits, they have a set of n-bit inputs, and n-bit outputs,
and an n-bit control input. The prototypical ALU, we have already seen, applies arithmetic or
logical operator to its regular inputs according to the value of the control input. The MMU is
very similar, it moves n-bit values between the RAM and the registers according to the value at
the control input. We say that the MMU moves the (n-bit) value from a register R to a memory
cell C, iff after the move both have the same value: that of R. This is usually implemented as a
query operation on R and a write operation to C. Both the ALU and the MMU could in principle
encode 2 n operators (or commands), in practice, they have fewer, since they share the command
space.
Circuit Overview over the CPU
ACC
ALU
Address
Logic
PC
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Program Store
Operation Argument
In this architecture (called the register machine architecture), programs are sequences of 2nbit
numbers. The first n-bit part encodes the instruction, the second one the argument of the
instruction. The program counter addresses the current instruction (operation + argument).
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