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General Computer Science 320201 GenCS I & II Lecture ... - Kwarc

General Computer Science 320201 GenCS I & II Lecture ... - Kwarc

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Example 443 (Address decoder logic for 2-bit addresses)<br />

c○: Michael Kohlhase 269<br />

Now we can combine an n-bit address decoder as sketched by the example above, with n D-flipflops<br />

to get a RAM element.<br />

Storage Elements<br />

Idea (Input): Use a D-flipflop connect its E input to the ADL output.<br />

Connect the D-input to the common RAM data input line. (input only if addressed)<br />

Idea (Output): Connect the flipflop output to common RAM output line. But first AND<br />

with ADL output (output only if addressed)<br />

Problem: The read process should leave the value of the gate unchanged.<br />

Idea: Introduce a “write enable” signal (protect data during read) AND it with the ADL<br />

output and connect it to the flipflop’s E input.<br />

Definition 444 A Storage Element is given by the following diagram<br />

c○: Michael Kohlhase 270<br />

So we have arrived at a solution for the problem how to make random access memory. In keeping<br />

with an introductory course, this the exposition above only shows a “solution in principle”; as<br />

RAM storage elements are crucial parts of computers that are produced by the billions, a great<br />

deal of engineering has been invested into their design, and as a consequence our solution above<br />

is not exactly what we actually have in our laptops nowadays.<br />

Remarks: Actual Storage Elements<br />

The storage elements are often simplified to reduce the number of transistors.<br />

For example, with care one can replace the flipflop by a capacitor.<br />

Also, with large memory chips it is not feasible to connect the data input and output and<br />

write enable lines directly to all storage elements.<br />

Also, with care one can use the same line for data input and data output.<br />

Today, multi-gigabyte RAM chips are on the market.<br />

150

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