FINFET Isolation Approaches and Ramifications - SOI Industry ...
FINFET Isolation Approaches and Ramifications - SOI Industry ...
FINFET Isolation Approaches and Ramifications - SOI Industry ...
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IBM Semiconductor Research <strong>and</strong> Development Center<br />
The 3D Effect in FinFET<br />
FD<strong>SOI</strong><br />
Effective width ~1X (current <strong>and</strong> capacitance)<br />
Aerial width ~0.7X<br />
FinFET<br />
• FD<strong>SOI</strong> is conventionally planar<br />
– The current drive <strong>and</strong> device<br />
capacitance <strong>and</strong> the layout footprint<br />
correspond directly<br />
Footprint width<br />
Electrical width<br />
• FinFET is 3-D<br />
– has more current drive (<strong>and</strong> also<br />
capacitance) per layout footprint<br />
Where the<br />
gate will be<br />
fin<br />
FD<strong>SOI</strong> Workshop Hsinchu, Taiwan April 22, 2013
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