Embedded Computing Design - OpenSystems Media

Hardware-based error detection and recovery inherent in RapidIO, when appropriately
configured, enable the fabric to provide redundancy at both the data link and switch levels.
A high-throughput signal processing application using RapidIO is shown in Figure 2.
“Minimal hardware and
software modification are
required to implement
RapidIO on existing
backplanes...”
Data requiring priority-based delivery can
be transferred using RapidIO, enabling
a smooth transition from existing busbased
approaches. Minimal hardware
and software modification are required
to implement RapidIO on existing backplanes,
so it can be easily added during
scheduled LRU replacements or upgrades.
Figure 2
RapidIO also offers scalability, enabling it to accommodate multiple intrasystem connection
requirements. RapidIO provides high-speed data links between a single-board computer
(SBC) and one or more PMC carriers as well as extremely high throughput for onboard
data pathways between memory and processor units on smaller systems. RapidIO as a
carrier for PCI Mezzanine extensions is shown in Figure 3.
Figure 3
For bigger systems, not only can RapidIO provide distributed packet switching for between
4 and 10 SBCs and their attached sensors, it can also be used in a more expansive full mesh
VXS application, as well as an external switch between multiple chassis or racks.
RapidIO’s ability to accommodate multiple operating frequencies and bandwidths enables
the optimization of multiple connection modes. The Parallel RapidIO specification
defines four possible operating frequencies from 250 MHz to 1 GHz, and 8-bit and 16-bit
bandwidths; the Serial RapidIO specification defines three operating frequencies from 1.25
to 3.125 GHz, and two widths 1x and 4x.
In each direction within the RapidIO link, data bandwidths range from a Gbps, in Serial
1.25 GHz @ 1x, to approximately 60 Gbps, in Parallel 1 GHz @ 16-bits. Embedded VME
systems benefit from the multiple connections available when implementing RapidIO.
A configuration of RapidIO-based signal processing network using eight dual processors
is shown in Figure 4.
Figure 4
In its upper performance ranges, RapidIO
provides bandwidth comparable to
Infiniband, Fibre Channel, or high-speed
Ethernet. However, these technologies are
more appropriately targeted to intersystem,
rather than intrasystem connections.
Each fabric has its own unique purpose
but, in general, they cannot supply the
compatibility provided by RapidIO’s
load/store architecture, or the capability
for supporting deterministic performance
that would enable them to be useful for
intrasystem interconnects, especially when
upgrading or enhancing existing legacy
systems. At this point, RapidIO provides
the best combination of high bandwidth,
low latency, transparency, and adaptability
required to support the next generation
of embedded systems and their attached
devices.
Luc Torres,
Marketing Product
Manager for Thales
Computers in
Toulon, France, has
extensive project and
product management
experience. He
has held various
managerial positions in the engineering
and marketing departments of IBM
Corporation and Hewlett-Packard. Luc
has a degree in Electrical Engineering.
For further information, contact Luc at:
Thales Computers
3100 Spring Forest Road
Raleigh, NC 27616
Tel: 800-848-2330 • Fax: 919-231-8001
E-mail: lto@thalescomputers.fr
Website: www.thalescomputers.com
28 / Summer 2004 Embedded Computing Design