Embedded Computing Design - OpenSystems Media

Company Name/Model No. Description Web Address
Performance Technologies
CPC5702
www.pt.com
A PICMG 2.16-compliant single board computer • 1.6 GHz Pentium M processor • 400 MHz front-side bus • Single-slot, 6U CompactPCI
board • Supports CompactPCI bus • PCI-to-PCI bridge interfaces to 32-bit or 64-bit CompactPCI bus operating at 33 or 66 MHz
• Supports up to 2 Gbytes of DDR SDRAM with ECC at 3.2 Gbytes/sec peak bandwidth • 1 Mbyte firmware hub • Battery-backed
real-time clock • Support for Performance Technologies’ NexusWare Linux-based development environment • Supports Windows
2000/XP, Linux, and VxWorks operating systems • 0°C to 55°C operating temperature
CPC7301
SG5600 Signaling
Gateway Blade
ZT 5541
ZT 4804
ZT 4805
ZT 4806
ZT 4807e
ZT 7102
RadiSys Corp
EPC-3311
EPC-3412
SBS Technologies
HDTBlade
VoABlade
Voiceboard
TDM to Packet
Processor
An intelligent CompactPCI shelf manager • Dedicated 600MHz processor manages all IPMI-based components • Fault-tolerant
operation with active/standby dual-ISM redundancy • Star topology provides enhanced reliability • Synchronization between
active/standby ISMs • Out-of-band management with dedicated Ethernet interface • Secure, fail-safe, and remote ISM firmware
updates via network • Hot-swap support for field-replaceable components • Compatible with IPnexus packet-based, IPMI-compliant
products • PICMG 2.1, PICMG 2.9, and PICMG 2.16 compatible • Manages via IPMI protocol • Multiple management standards: SNMP,
IPMI, RMCP, Telnet, and SSH • Command Line Interface (CLI) integrates scripts with ISM • CLI access through SSH or Telnet • ISM
API allows integration with third-party applications • Web-based interface
A PICMG 2.16-compliant signaling gateway blade • Carrier-grade system-in-a-slot • Standards-based IETF SIGTRAN IP/SS7 protocols
• Reliable and robust software and hardware • H.110 bus support
A peripheral master CPU board with a 500 MHz Pentium III processor • Processor is a new high-density, ball grid array (BGA) device
that combines high density and high performance in a low profile package for mobile and communications applications • 100 MHz
system bus • Dual 10/100Base-T Ethernet network interfaces • Two PMC mezzanine sites • Hard drive • 512 Mbytes of memory • AGP
Video • Operating systems support includes WindowsNT, Linux, and VxWorks
A rear-panel transition board with alarm outputs • SMBus interface for alarm control • Six jumper-selectable relay outputs • Two
jumper-selectable user inputs • Host Hot-Swap activation through bottom ejector latch circuitry • Internal floppy and IDE interfaces
• Rear-panel switches for alarming, reset, and Hot-Swap initiate
A rear-panel transition board • Internal CompactFlash-selectable as master or slave • Two internal IDE interfaces • External rear-panel
interface connectors for the host CPU include two Ethernet connectors, two serial ports, keyboard/mouse, VGA, and USB • Reset
request • Four-pin power connector for external media • Internal connectors for legacy interfaces (floppy, LPT) • Unique Serial ID
provided by a DS2401
A 6U, single-slot, rear-panel transition board • Designed to function in the 80mm rear-panel slot of a CompactPCI system that accepts
6U boards • Rear-panel I/O interfaces • Internal floppy and IDE interfaces • Rear-panel reset switch • Rear-panel LEDs
A rear-panel transition board • PICMG 2.16 compliant • Rear-panel interfaces include: Ethernet link and activity status LEDs, two serial
ports, keyboard/mouse-combination PS/2 connector, VGA, and 2 USB connectors • Internal floppy and IDE interfaces • Rear-panel
reset and NMI switches • Rear-panel LEDs (hot-swap and IDE activity) • Internal CompactFlash interface
A chassis management module • High-density 3U CompactPCI form factor • Works within PICMG 2.16- and 2.9-compliant components
• Utilizes IPMI in a star topology • Provides isolated I2C signals for each slot • 10/100Base-T Ethernet available at the front or rear
panel • RS-232 (command-line interface) available at the front or rear panel • DB15 telco alarm interface at the front panel • Supports
multiple management standards including SNMP, IPMI, and Telnet comprehensive monitoring for health, status, and component
presence • Out-of-band, network-accessible management interface • XScale processor design • Hot-add/hot-swap support for all
IPMI-based field-replaceable components • Individual slot power control for power-on sequencing supports 21 slots when integrated
into a custom backplane or chassis
www.radisys.com
A high-throughput CPU blade • 1 GHz Pentium III processor • Gigabit Ethernet • 2 Gbytes SDRAM • Single-slot PICMG 2.16 processor
• 133 MHz processor system bus • Two PMC sites • Two tri-mode (10/100/1000) Ethernet links • DMA access
A PICMG 2.16-compliant CPU blade • Full PICMG 2.16 and 2.9 compliance • 1.2 GHz Mobile Intel Pentium 4 Processor-M • Intel 845E
with ICH4 chipset • 400 MHz front-side bus • One 184-pin DIMM socket for up to 2 Gbytes of DDR200 ECC SDRAM • One 32-bit PMC
expansion site • Optional IDE hard drive (occupies the PMC site) • Intelligent Platform Management Interface (IPMI) • Front-panel
reset switch and COM1 port • 6U CompactPCI form factor
www.sbs.com
A high-density CompactPCI T1/E1 blade for edge and enterprise-level communications systems • Designed for applications requiring
high-performance monitoring of multiple T1/E1 ports • 32 T1/E1 ports supporting 1024 HDLC channels • 6U CompactPCI board compliant
to PICMG 2.16 R1.0 • IPMI subsystem monitors system status • Includes a PowerPC-based PMC card running Linux for control I/O •
Includes a Linux support package
A 6U, single-slot CompactPCI blade for transmitting voice and data over an integrated ATM network • 66 MHz/64-bit CompactPCI
interface • Capable of sending and receiving a total of 2048 simultaneous voice and data virtual circuits over a single fiber-optic
connection at speeds up to 155 Mbytes/sec • ATM AAL1, AAL2, and AAL5 support on intelligent ATM interface card • Bidirectional
voice channel capacity • Onboard OC-3/STM-1 optical physical interface (PHY) • Two 10/100Base-T Ethernet MAC/PHYs accessed
through front I/O • Supports up to 2048 full-duplex AAL1 VCs without Channel Associated Signaling (CAS) or up to 1023 full-duplex
AAL1 or AAL2 with CAS • High-bandwidth intersystem communication interfaces include H.110 TDM bus • High-level host processor
APIs • Driver development kits available
www.voiceboard.com
A processor blade for converting TDM data to IP packets • HDLC frame extraction, insertion, and CRC checking • 56K or 64K data handling
• Programmable ring buffer sizes for real-time and data capture modules • Generation of user-specified data patterns • Selection
of any 1024 time slots (512 bidirectional channels) from the H.110 TDM backplane • IP data streaming via dual 10/100Base-T Ethernet
ports • RTP or AAL packetizing of data streams • Data time stamping • Independent control of each channel’s real-time streaming and
buffered memory data capture modes • PICMG 2.16 PSB compliant • Selectable data capture termination modes with snapshot data
capture mode • May be optionally equipped with eight software selectable T1/E1/J1 span network interfaces
Embedded Computing Design Summer 2004 / 57