FS4400 PCI Express State Analysis Probe User Manual - FuturePlus ...
FS4400 PCI Express State Analysis Probe User Manual - FuturePlus ...
FS4400 PCI Express State Analysis Probe User Manual - FuturePlus ...
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Introduction<br />
How to Use This<br />
<strong>Manual</strong><br />
This manual is organized to help you quickly find the information you need.<br />
• Analyzing the <strong>PCI</strong> <strong>Express</strong> Bus chapter introduces you to the <strong>FS4400</strong> and lists<br />
the minimum equipment required and accessories supplied for <strong>PCI</strong> <strong>Express</strong> bus<br />
analysis.<br />
• The <strong>State</strong> <strong>Analysis</strong> chapter explains how to configure the <strong>FS4400</strong> to perform state<br />
analysis on your <strong>PCI</strong> <strong>Express</strong> bus.<br />
• The Transaction Viewer chapter is a brief overview of this application software that<br />
integrates with the <strong>FS4400</strong> Protocol Decoder. For more detail on its operation refer<br />
to the FS1150 <strong>User</strong> manual on the <strong>FuturePlus</strong> Systems documentation CD.<br />
• The General Information chapter provides information on the operating<br />
characteristics, and cable header pinout for the <strong>FS4400</strong> probe.<br />
Definitions<br />
The following terms are used to describe aspects of the <strong>PCI</strong> <strong>Express</strong> bus:<br />
• Channel - One differential signal (2 wires).<br />
• <strong>PCI</strong>e Lane - A pair of differential signals running in opposite directions (4 wires).<br />
• <strong>PCI</strong>e Link - A bidirectional interface made with two sets of unidirectional signals. A<br />
Link consists of 1, 2, 4, or 8 lanes.<br />
• Link - One direction of a <strong>PCI</strong>e link. The <strong>FS4400</strong> handles 1 or 2 links at a time,<br />
independently. This supports probing of both directions of a <strong>PCI</strong>e link, or probing of<br />
a pair of unrelated one-direction links. Links may be merged when displayed on the<br />
logic analyzer.<br />
• Lane - One direction of a <strong>PCI</strong>e lane.<br />
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