PCI8280 Telecom PCI Module Technical Reference Manual ... - NAT
PCI8280 Telecom PCI Module Technical Reference Manual ... - NAT
PCI8280 Telecom PCI Module Technical Reference Manual ... - NAT
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3.3 Memory<br />
3.3.1 SDRAM<br />
<strong><strong>PCI</strong>8280</strong> – <strong>Technical</strong> <strong>Reference</strong> <strong>Manual</strong><br />
As the onboard SDRAM memory has to be accessed not only be the CPU, but also by the host<br />
trough the <strong>PCI</strong> bridge, external address latches and multiplexers had to be implemented. The<br />
structure is shown in Figure 3: below.<br />
Figure 3: Address / Data Paths to onboard Devices<br />
MPC<br />
8280<br />
PD22<br />
PD23<br />
Addr.<br />
64 bit Data<br />
Address<br />
Latch,<br />
SDRAM<br />
MUX<br />
SDRAM Control<br />
DRTYPEx<br />
SDRAM Addr.<br />
latched Adress<br />
SDRAM<br />
SODIMM<br />
<strong>Module</strong><br />
other<br />
Devices<br />
The SDRAM is connected to the 60x bus interface of the MPC8280. The multiplexer organisation<br />
can be adjusted to different SDRAM types by the DRTYPEx selection signals. Suitable<br />
SDRAM modules must be of PC100 or PC133 type. Refer to Chapter 4, Table 9: and Table<br />
10: for further information on SODIMM modules.<br />
Version 1.2 © N.A.T. GmbH 15
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