A formal description of SYSTEM/360

Input/outputThe SYSTEM/B~O input/output included in this formal descriptioncomprises five system programs: CH" (channel c), IOIE (I/Ointerruption entry), HFC" (hardware failure in channel c), TOL"(time-out limiter for channel c), and BMT (burst-mode timer).The description extends as far as the interface between a channel,which communicates directly with the CPU and the systemmemory M, and control units, which are closely associated withinput/output devices.Channels are of two major types, multiplexor and selector,and a system has at most one of the former and six of the latter.Both types are encompassed in the general program CH, wherec is the channel number, the number zero being reserved for amultiplexor channel. In a formal reading of the program, thevalue of c is fixed, and the single program CH represents severalindependent programs, one for each channel in the system. Thebehavior of a multiplexor channel (c = 0) differs significantlyfrom that of a selector channel; the differences appear wherevera statement involves the terms (c = 0) or (c # 0) or involvesa branch based on the variable c. For example, because of thebranch on CH line 46, lines 47 and 48 apply only to the multiplexorchannel, a point emphasized by the use of the superscript0 rather than c.The programs TOL" and HFC" also represent a multiplicityof similar, but not necessarily identical, programs for differentvalues of c. However, operational differences in these programsdepend not upon distinctions between multiplexor and selectorchannels, but rather upon model-dependent factors such as thedegree to which a particular channel shares physical facilitieswith the CPU. These factors are reflected in the "channel model"matrix CM.At this point, Table 3 merits further study for the informationit yields with regard to the logical structure of the input/outputsystem. It will be found that most of the channel variables areformally matrices, with the rows indexed by the channel number.The rows are therefore completely independent in their behavior,and a column is of interest per se only in the case of pendinginterruptions ( B8), as shown in CPU line 25 and IOIE line 1.Analogously, matrix V possesses one row for each control uniton the system, and CH line 37 uses columns V8 and V12.A channel resembles an independent computer insofar as itexecutes a sequence of special fixed-length (8-byte) instructions,called commands, stored in the system memory M. To this endit possesses a sequence counter aZ4/CAW1 (initially set by an1/0 instruction of the CPU) and a command register C". Thecommands themselves are limited, so far as the channel is concerned,to the transfer of information to or from M, known respectivelyas read and write, and a respecification of the next