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Chapter 4 Introduction

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Morgan Kaufmann Publishers 31 January 2013Data Hazards for Branchesn If a comparison register is a destination of2 nd or 3 rd preceding ALU instructionadd $1, $2, $3IF ID EX MEM WBadd $4, $5, $6IF ID EX MEM WB…IF ID EX MEM WBbeq $1, $4, targetIF ID EX MEM WBn Can resolve using forwardingCSE 420 <strong>Chapter</strong> 4 — The Processor — 87Data Hazards for Branchesn If a comparison register is a destination ofpreceding ALU instruction or 2 nd precedingload instructionn Need 1 stall cyclelw $1, addrIF ID EX MEM WBadd $4, $5, $6IF ID EX MEM WBbeq stalledIFIDbeq $1, $4, targetID EX MEM WBCSE 420 <strong>Chapter</strong> 4 — The Processor — 88

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