Commonly Used Metrics for Performance Analysis - Power.org

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Metrics for Performance AnalysisUnit (either the Branch Unit or the CR unit).PM_CMPLU_STALL_LSUCompletion stall caused by LSU instructionFollowing a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes was from the Load Store Unit.PM_CMPLU_STALL_REJECT Completion stall caused by rejectFollowing a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes suffered a load/store reject.PM_CMPLU_STALL_SCALAR Completion stall caused by FPU instructionFollowing a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes was a scalar floating pointinstruction.PM_CMPLU_STALL_SCALAR_LONG Completion stall caused by long latency scalar instructionFollowing a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes was a floating point divide orsquare root instruction.PM_CMPLU_STALL_STORE Completion stall due to store instructionFollowing a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes was a store. This generallyhappens when we run out of real SRQ entries, which prevents stores from issuing.PM_CMPLU_STALL_THRDCompletion stall due to thread conflict. Group ready to complete butit was another thread's turn.Following a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the thread could not complete a group because the completion port it’s sharing wasbeing used by another thread. In SMT4 mode, Thread0 and thread2 share a completion port and Thread1and Thread3 share another completion port.PM_CMPLU_STALL_VECTOR Completion stall caused by Vector instructionFollowing a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes was a vector instruction.PM_CMPLU_STALL_VECTOR_LONG Completion stall due to long latency vector instruction.Following a completion stall (any period when no groups completed and the group completion table was notempty for that thread) the last instruction to finish before completion resumes was a long latency vectorinstruction.PM_GCT_NOSLOT_BR_MPRED GCT empty by branch mispredictionThese cycles occur when the Global Completion Table has no slots from this thread because of a branchmisprediction.PM_GCT_NOSLOT_BR_MPRED_IC_MISS GCT empty by branch misprediction + IC missThese cycles occur when the Global Completion Table has no slots from this thread because of a branchmisprediction and an instruction cache miss.PM_GCT_NOSLOT_CYCNo itags assignedThese cycles occur when the Global Completion Table has no slots from this thread.PM_GCT_NOSLOT_IC_MISS GCT empty by I-cache missThese cycles occur when the Global Completion Table has no slots from this thread because of an instructioncache miss.PM_GRP_CMPLGroup completedCopyright ©2011 IBM Corporation Page 18 of 52
Metrics for Performance AnalysisA group completed. Microcoded instructions that span multiple groups will generate this event once pergroup. This ensures that each completed group will be counted.PM_RUN_CYCRun cyclesThe processor cycles that are gated by the run latch. Operating systems use the run latch to indicate whenthey are doing useful work. The run latch is typically cleared in the OS idle loop. Gating by the run latch filtersout the idle loop.PM_RUN_INST_CMPLRun InstructionsNumber of PowerPC instructions completed, gated by the run latch.6.2 MetricsThe CPI stack analysis uses the following metrics:BASE_COMPLETION_CPIBase Completion CyclesFormula: PM_1PLUS_PPC_CMPL/PM_RUN_INST_CMPLCOMPLETION_CPICycles in which a Group CompletedFormula: PM_GRP_CMPL/PM_RUN_INST_CMPLEXPANSION_OVERHEAD_CPI Cycles due to go overhead of expansionFormula: COMPLETION_CPI - BASE_COMPLETION_CPIFXU_STALL_CPICycles stalled by Fixed-point UnitFormula: PM_CMPLU_STALL_FXU/PM_RUN_INST_CMPLFXU_MULTI_CYC_CPICycles stalled by FXU Multi-Cycle InstructionsFormula: PM_CMPLU_STALL_DIV/PM_RUN_INST_CMPLFXU_STALL_OTHER_CPIOther cycles stalled by FXUFormula: FXU_STALL_CPI - FXU_MULTI_CYC_CPIGCT_EMPTY_CPIGCT empty cyclesFormula: PM_GCT_NOSLOT_CYC/PM_RUN_INST_CMPLGCT_EMPTY_IC_MISS_CPICycles GCT empty due to I-Cache MissesFormula: PM_GCT_NOSLOT_IC_MISS/PM_RUN_INST_CMPLGCT_EMPTY_BR_MPRED_CPI Cycles GCT empty due to Branch MispredictsFormula: PM_GCT_NOSLOT_BR_MPRED/PM_RUN_INST_CMPLGCT_EMPTY_BR_MPRED_IC_MISS_CPI Cycles GCT empty due to Branch Mispredicts and I-cacheMissesFormula: PM_GCT_NOSLOT_BR_MPRED_IC_MISS/PM_RUN_INST_CMPLGCT_EMPTY_OTHER_CPIOther GCT empty cyclesFormula: (PM_GCT_NOSLOT_CYC-PM_GCT_NOSLOT_IC_MISS-PM_GCT_NOSLOT_BR_MPRED-PM_GCT_NOSLOT_BR_MPRED_IC_MISS) / PM_RUN_INST_CMPLIFU_STALL_CPICycles stalled due to Instruction Fetch UnitFormula: PM_CMPLU_STALL_IFU/PM_RUN_INST_CMPLIFU_STALL_BRU_CPICycles stalled by branchesFormula: PM_CMPLU_STALL_BRU/PM_RUN_INST_CMPLCopyright ©2011 IBM Corporation Page 19 of 52
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