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Commonly Used Metrics for Performance Analysis - Power.org

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<strong>Metrics</strong> <strong>for</strong> Per<strong>for</strong>mance <strong>Analysis</strong>12 Address TranslationThis chapter lists and describes the events, metrics and groups needed to characterize address translation.12.1Descriptions of EventsThere are 11 events, distributed across 4 event groups, needed <strong>for</strong> these POWER7 address translationmetrics. These include 1 architected event counting non-idle completed instructions.This section provides more details on each event and how it is triggered.PM_DERAT_MISS_4KDERAT misses <strong>for</strong> 4K pageThe source page size of a DERAT reload is 4KPM_DERAT_MISS_64KDERAT misses <strong>for</strong> 64K pageThe source page size of a DERAT reload is 64KPM_DERAT_MISS_16MDERAT misses <strong>for</strong> 16M pageThe source page size of a DERAT reload is 16MPM_DERAT_MISS_16GDERAT misses <strong>for</strong> 16G pageThe source page size of a DERAT reload is 16GPM_DSLB_MISSData SLB Miss - Total of all segment sizesA SLB miss <strong>for</strong> a data request occurred. SLB misses trap to the operating system to resolve. This is a totalcount <strong>for</strong> all segment sizes.PM_DTLB_MISSTLB reload validData TLB misses, all page sizes.PM_IERAT_MISSIERAT Miss (Not implemented as DI on POWER6)An entry was written into the IERAT as a result of an IERAT miss.PM_ISLB_MISSInstruction SLB Miss - Tota of all segment sizesA SLB miss <strong>for</strong> an instruction fetch has occurred.SLB misses trap to the operating system to resolve. This is atotal count <strong>for</strong> all segment sizes.PM_L1_ICACHE_MISSDemand iCache MissAn instruction fetch missed the L1 Instruction cachePM_LSU_DERAT_MISSDERAT Reloaded due to a DERAT missTotal D-ERAT Misses. Requests that miss the DERAT are rejected and retried until the request hits in theErat. This may result in multiple erat misses <strong>for</strong> the same instruction. Combined Unit 0 + 1.PM_RUN_INST_CMPLRun InstructionsNumber of <strong>Power</strong>PC instructions completed, gated by the run latch.12.2<strong>Metrics</strong>Address translation is characterized with the following metrics:DERAT_Miss_Rate(%)DERAT Miss Rate (per run instruction)(%)Formula: PM_LSU_DERAT_MISS * 100 / PM_RUN_INST_CMPLDERAT_4K_Miss_Rate(%)% DERAT miss rate <strong>for</strong> 4K page per instructionCopyright ©2011 IBM Corporation Page 37 of 52

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