dsPIC33FJ12MC201/202 Data Sheet - Microchip

dsPIC33FJ12MC201/202The SA and SB bits are modified each time datapasses through the adder/subtracter, but can only becleared by the user application. When set, they indicatethat the accumulator has overflowed its maximumrange (bit 31 for 32-bit saturation or bit 39 for 40-bitsaturation) and will be saturated (if saturation isenabled). When saturation is not enabled, SA and SBdefault to bit 39 overflow, and therefore, indicate that acatastrophic overflow has occurred. If the COVTE bit inthe INTCON1 register is set, the SA and SB bits willgenerate an arithmetic warning trap when saturation isdisabled.The Overflow and Saturation Status bits can optionallybe viewed in the STATUS Register (SR) as the logicalOR of OA and OB (in bit OAB) and the logical OR of SAand SB (in bit SAB). Programmers can check one bit inthe STATUS register to determine whether eitheraccumulator has overflowed, or one bit to determinewhether either accumulator has saturated. This isuseful for complex number arithmetic, which typicallyuses both accumulators.The device supports three Saturation and Overflowmodes:• Bit 39 Overflow and Saturation:When bit 39 overflow and saturation occurs, thesaturation logic loads the maximally positive 9.31value (0x7FFFFFFFFF) or maximally negative 9.31value (0x8000000000) into the target accumulator.The SA or SB bit is set and remains set untilcleared by the user application. This condition isreferred to as ‘super saturation’ and provides protectionagainst erroneous data or unexpected algorithmproblems (such as gain calculations).• Bit 31 Overflow and Saturation:When bit 31 overflow and saturation occurs, thesaturation logic then loads the maximally positive1.31 value (0x007FFFFFFF) or maximally negative1.31 value (0x0080000000) into the targetaccumulator. The SA or SB bit is set and remainsset until cleared by the user application. Whenthis Saturation mode is in effect, the guard bits arenot used, so the OA, OB or OAB bits are neverset.• Bit 39 Catastrophic Overflow:The bit 39 Overflow Status bit from the adder isused to set the SA or SB bit, which remains setuntil cleared by the user application. No saturationoperation is performed, and the accumulator isallowed to overflow, destroying its sign. If theCOVTE bit in the INTCON1 register is set, acatastrophic overflow can initiate a trap exception.3.6.3 ACCUMULATOR ‘WRITE BACK’The MAC class of instructions (with the exception ofMPY, MPY.N, ED, and EDAC) can optionally write arounded version of the high word (bits 31 through 16)of the accumulator which is not targeted by the instructioninto data space memory. The write is performedacross the X bus into combined X and Y addressspace. The following addressing modes are supported:• W13, Register Direct:The rounded contents of the non-targetaccumulator are written into W13 as a1.15 fraction.• [W13] + = 2, Register Indirect with Post-Increment:The rounded contents of the non-target accumulatorare written into the address pointed to byW13 as a 1.15 fraction. W13 is then incrementedby 2 (for a word write).DS70265E-page 28© 2007-2011 Microchip Technology Inc.