Pro/DIAGRAM Help Topic Collection - To DataJett.com

Pro/DIAGRAM - Help Topic Collection
orthogonal_snap
yes, no
Controls non-90 degree routing in Pro/DIAGRAM.
yes—Turns the Ortho Snap function on; allowing you to sketch wires only at the
default horizontal and vertical orientations.
no—Allows you to sketch wires in drawings at angles other than the default
horizontal and vertical orientations.
Logical Referencing
About Logical Referencing
Logical referencing is transferring electrical design data between a diagram and
a.corresponding 3D cabling model, so that they can both store and use the same
information, and reflect engineering change orders accurately.
Cabling assemblies can directly reference diagram (.dgm) files. You can also import a
wirelist to a diagram or cabling assembly in Mentor Graphics, PTC Neutral format
(.nwf), or XML format (.xml). You can export data from a diagram in PTC Neutral
format or XML format (.xml). During the design process, you can compare the
diagram and the 3D model object by object, to be sure that data is synchronized for
both designs.
To Import or Export a Wire List
1. Click Tools > Logical Reference > Import (or Export).
2. If you choose Import, select the format from the WIRELIST IMP menu. You
can import logical information from a Mentor Graphics format wire list file, PTC
neutral wire list file or an XML format (.xml) file.
3. If you choose Export, use the browser to name the export file.
To Compare Logical References
You can compare the logical connections of the diagram with either a cabling
assembly or an ASCII wire list. This allows you to see if any logical connection in the
diagram is missing or incorrect in the 3D harness.
1. Click Tools > Logical Reference > Compare. The COMPARE menu appears
with checkboxes for each diagram object on the wirelist. Check each object you
want to compare:
10
o Wire and Cable Spools—A match occurs if they all have the same
parameters with the same values. A subset match, indicated by the word
SUBSET in parentheses in the comparison output file, occurs if all the
parameters common to both referenced and design data have the same
values. The spools are identified by the spool names.