COMPUTING

Chapter 5 Operational AmplifiersAlso,C = C 1 = C 2 = -----------------------------------1= 15.9 μF2π × 10 5 × 10 3and the circuit is as shown in Figure 5.80.V10100 KΩ 15.9 μF 100 KΩ KΩ15.9 μF50 KΩD 1 D 2V out5.23 Digital−to−Analog ConvertersFigure 5.80. Circuit for Example 5.21As we will see in Chapter 6, digital systems * recognize only two levels of voltage referred to asHIGH and LOW signals or as logical 1 and logical 0. This two−level scheme works well with thebinary number system. It is customary to indicate the HIGH (logical 1)and LOW (logical 0) bySingle−Pole−Double−Throw (SPDT) switches that can be set to a positive non−zero voltage like 5volts for HIGH and zero volts or ground for LOW as shown in Figure 5.81.V N V D V C V BV A5 V 5 V 5 V 5 V 5 VFigure 5.81. Digital circuit represented by SPDT switchesIn Figure 5.81 V D = 0 , V C = 1 , V B = 0 , and V A = 1 , that is, switches A and C are HIGH (5volts) and switches B and D are LOW (0 volts). The first 16 binary numbers representing all possiblecombinations of the four switches with voltage settings (least significant position)through (most significant position), and their decimal equivalents are shown in Table 5.1.V DV A* Refer also to Digital Circuit Analysis and Design with Simulink Modeling and Introduction to CPLDs and FPGAs,ISBN 978−1−934404−05−8.5−52Electronic Devices and Amplifier Circuits with MATLAB Computing, Second EditionCopyright © Orchard Publications