Design Checklist for PowerQUICC II Pro MPC8309 Processor

Functional Blocks
7.7 I 2 C Interface
There are two I 2 C ports. Table 14 lists the I 2 C1 pins.
Signal Pin Type
7.8 SPI
Table 15 lists the SPI pins.
Table 14. I 2 C Pin Listing
Connection
If Used If Not Used
Design Checklist for PowerQUICC II Pro MPC8309 Processor, Rev. 1
28 Freescale Semiconductor
Notes
IIC_SCL1 I/O As needed + 2 k–10 k��to OV DD 2k–10k� to OV DD Open-drain signal
IIC_SDA1 I/O As needed + 2 k–10 k� to OV DD 2k–10k� to OV DD Open-drain signal
IIC_SCL2 I/O As needed + 2 k–10 k��to OV DD 2k–10k� to OV DD Open-drain signal
IIC_SDA2 I/O As needed + 2 k–10 k� to OV DD 2k–10k� to OV DD Open-drain signal
Signal Pin Type
Table 15. SPI Pin Listing
Connection
SPIMOSI I/O As needed + 2 k–10 k� to
OV DD
SPIMISO I/O As needed + 2 k–10 k� to
OV DD
SPICLK I/O As needed + 2 k–10 k� to
OV DD
SPISEL I As needed + 2 k–10 k� to
OV DD
SPISEL_BOOT I/O As needed + 2 k–10 k� to
OV DD
If Used If Not Used
2 k–10 k� to OV DD
2 k–10 k� to OV DD
2 k–10 k� to OV DD
Notes
2 k–10 k� to OV DD Must be used when SPI is configured as slave
Open/ 2k–10k� to
OV DD
—
—
—
Pull up required if IIC_SDA2 function is
chosen for this pin and it is unused.
Can be left open if SPISEL_BOOT or
CKSTOP_OUT function is chosen for this pin
and it is unused.