ARM Processor Instruction Set

ARM Processor Instruction Set
5.8.9 Assembler syntax
5-30
{cond} Rn{!},{^}
where:
{cond} is a two-character condition mnemonic, see Figure 5-2: Condition
codes on page 5-2
Rn is an expression evaluating to a valid register number
is a list of registers and register ranges enclosed in {} (e.g. {R0,R2-
R7,R10}).
{!} (if present) requests write-back (W=1), otherwise W=0
{^} (if present) set S bit to load the CPSR along with the PC, or force
transfer of user bank when in privileged mode
5.8.10 Addressing mode names
There are different assembler mnemonics for each of the addressing modes,
depending on whether the instruction is being used to support stacks or for other
purposes. The equivalencies between the names and the values of the bits in
the instruction are shown in Table 5-6: Addressing mode names:
Key to table
FD, ED, FA, EA define pre/post indexing and the up/down bit by reference to the form
of stack required.
F Full stack (a pre-index has to be done before storing to the stack)
E Empty stack
A The stack is ascending (an STM will go up and LDM down)
D The stack is descending (an STM will go down and LDM up)
The following symbols allow control when LDM/STM are not being used for stacks:
IA Increment After
IB Increment Before
DA Decrement After
DB Decrement Before
ARM7500FE Data Sheet
ARM DDI 0077B
Named Partner Open Confidential Access - Preliminary - Preliminary Draft