ARM Processor Instruction Set

ARM Processor Instruction Set
5.9 Single Data Swap (SWP)
5-32
The instruction is only executed if the condition is true. The various conditions are
defined at the beginning of this chapter. The instruction encoding is shown in Figure
5-21: Swap instruction.
31 28 27
23 22 21 20 19 16 15 12 11 8 7
4 3
Cond 00010 B 00 Rn Rd 0000 1001 Rm
Destination register
Source register
Base register
Byte/Word bit
0 = swap word quantity
1 = swap byte quantity
Condition field
Figure 5-21: Swap instruction
Data swap instruction
The data swap instruction is used to swap a byte or word quantity between a register
and external memory. This instruction is implemented as a memory read followed by
a memory write which are “locked” together (the processor cannot be interrupted until
both operations have completed, and the memory manager is warned to treat them as
inseparable). This class of instruction is particularly useful for implementing software
semaphores.
Swap address
The swap address is determined by the contents of the base register (Rn).
The processor first reads the contents of the swap address. Then it writes the contents
of the source register (Rm) to the swap address, and stores the old memory contents
in the destination register (Rd). The same register can be specified as both the source
and the destination.
ARM710 lock feature
The ARM7500FE does not use the lock feature available in the ARM710 macrocell.
You must take care to ensure that control of the memory is not removed from the ARM
processor while it is performing this instruction.
ARM7500FE Data Sheet
ARM DDI 0077B
Named Partner Open Confidential Access - Preliminary - Preliminary Draft
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