Chapter 24 Multichannel Serial Port Interface (McSPI).
Chapter 24 Multichannel Serial Port Interface (McSPI).
Chapter 24 Multichannel Serial Port Interface (McSPI).
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
www.ti.com <strong>McSPI</strong> Registers<br />
<strong>24</strong>.5.1.5 <strong>McSPI</strong> Interrupt Enable Register (MCSPI_IRQENABLE)<br />
This <strong>McSPI</strong> interrupt enable register (MCSPI_IRQENABLE) enables/disables the module internal sources<br />
of interrupt, on an event-by-event basis. The MCSPI_IRQENABLE is shown in Figure <strong>24</strong>-30 and described<br />
in Table <strong>24</strong>-15.<br />
Figure <strong>24</strong>-30. <strong>McSPI</strong> Interrupt Enable Register (MCSPI_IRQENABLE)<br />
31 18 17 16<br />
Reserved EOWKE Rsvd<br />
R/W-0 R/W-0 R-0<br />
15 14 13 12 11 10 9 8<br />
Rsvd RX3_FULL_ TX3_UNDERFLOW_ TX3_EMPTY_ Reserved RX2_FULL_ TX2_UNDERFLOW_ TX2_EMPTY_<br />
ENABLE ENABLE ENABLE ENABLE ENABLE ENABLE<br />
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0<br />
7 6 5 4 3 2 1 0<br />
Rsvd RX1_FULL_ TX1_UNDERFLOW_ TX1_EMPTY_ RX0_OVERFLOW_ RX0_FULL_ TX0_UNDERFLOW_ TX0_EMPTY_<br />
ENABLE ENABLE ENABLE ENABLE ENABLE ENABLE ENABLE<br />
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0<br />
LEGEND: R/W = Read/Write; -n = value after reset<br />
Table <strong>24</strong>-15. <strong>McSPI</strong> Interrupt Enable Register (MCSPI_IRQENABLE) Field Descriptions<br />
Bit Field Value Description<br />
31-18 Reserved 0 Reads return 0<br />
17 EOWKE End of word count interrupt enable.<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
16 Reserved Reserved<br />
15 Reserved 0 Reads return 0<br />
14 RX3_FULL_ ENABLE MCSPI_RX3 receiver register full or almost full interrupt enable (channel 3).<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
13 TX3_UNDERFLOW_ ENABLE MCSPI_TX3 transmitter register underflow interrupt enable (channel 3).<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
12 TX3_EMPTY_ ENABLE MCSPI_TX3 transmitter register empty or almost empty interrupt enable<br />
(channel 3).<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
11 Reserved 0 Reads return 0<br />
10 RX2_FULL_ ENABLE MCSPI_RX2 receiver register full or almost full interrupt enable (channel 2).<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
9 TX2_UNDERFLOW_ ENABLE MCSPI_TX2 transmitter register underflow interrupt enable (channel 2).<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
8 TX2_EMPTY_ ENABLE MCSPI_TX2 transmitter register empty or almost empty interrupt enable<br />
(channel 2).<br />
0 Interrupt is disabled.<br />
1 Interrupt is enabled.<br />
7 Reserved 0 Reads return 0<br />
SPRUH73E–October 2011–Revised May 2012 <strong>Multichannel</strong> <strong>Serial</strong> <strong>Port</strong> <strong>Interface</strong> (<strong>McSPI</strong>)<br />
Submit Documentation Feedback<br />
Copyright © 2011–2012, Texas Instruments Incorporated<br />
4167
Change language