AVR Instruction Set Nomenclature: Status Register (SREG ...

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SBIW - Subtract Immediate from Word Description: Subtracts an immediate value (0-63) from a register pair and places the result in the register pair. This instruction operates on the upper four register pairs, and is well suited for operations on the pointer registers. Operation: (i) Rd+1:Rd ← Rd+1:Rd - K Syntax: Operands: Program Counter: (i) SBIW Rd,K d ∈ {24,26,28,30}, 0 ≤ K ≤ 63 PC ← PC + 1 106 16-bit Opcode: Status Register (SREG) and Boolean Formula: S: N ⊕ V, For signed tests. V: Rdh7 •R15 Set if two’s complement overflow resulted from the operation; cleared otherwise. N: R15 Set if MSB of the result is set; cleared otherwise. Z: R15• R14 •R13 •R12 •R11• R10• R9• R8• R7• R6 •R5• R4• R3 •R2• R1• R0 Set if the result is $0000; cleared otherwise. C: R15• Rdh7 Set if the absolute value of K is larger than the absolute value of Rd; cleared otherwise. R (Result) equals Rdh:Rdl after the operation (Rdh7-Rdh0 = R15-R8, Rdl7-Rdl0=R7-R0). Example: 1001 0111 KKdd KKKK I T H S V N Z C - - - ⇔ ⇔ ⇔ ⇔ ⇔ Words: 1 (2 bytes) Cycles: 2 sbiw r24,1 ; Subtract 1 from r25:r24 sbiw r28,63 ; Subtract 63 from the Y pointer(r29:r28) Instruction Set
SBR - Set Bits in Register Instruction Set Description: Sets specified bits in register Rd. Performs the logical ORI between the contents of register Rd and a constant mask K and places the result in the destination register Rd. Operation: (i) Rd ← Rd v K Syntax: Operands: Program Counter: (i) SBR Rd,K 16 ≤ d ≤ 31, 0 ≤ K ≤ 255 PC ← PC + 1 16-bit Opcode: Status Register (SREG) and Boolean Formula: S: N ⊕ V, For signed tests. V: 0 Cleared N: R7 Set if MSB of the result is set; cleared otherwise. Z: R7• R6 •R5• R4• R3 •R2• R1• R0 Set if the result is $00; cleared otherwise. R (Result) equals Rd after the operation. Example: 0110 KKKK dddd KKKK I T H S V N Z C - - - ⇔ 0 ⇔ ⇔ - Words: 1 (2 bytes) Cycles: 1 sbr r16,3 ; Set bits 0 and 1 in r16 sbr r17,$F0 ; Set 4 MSB in r17 107
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Instruction Set Nomenclature: Statu
Page 3 and 4:
Conditional Branch Summary Instruct
Page 5 and 6:
Instruction Set Summary (Continued)
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Instruction Set Summary (Continued)
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ADC - Add with Carry Description: A
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ADIW - Add Immediate to Word Instru
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ANDI - Logical AND with Immediate I
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BCLR - Bit Clear in SREG Descriptio
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BRBC - Branch if Bit in SREG is Cle
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BRCC - Branch if Carry Cleared Inst
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BREQ - Branch if Equal Instruction
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BRHC - Branch if Half Carry Flag is
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BRID - Branch if Global Interrupt i
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BRLO - Branch if Lower (Unsigned) I
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BRMI - Branch if Minus Instruction
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BRPL - Branch if Plus Instruction S
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BRTC - Branch if the T Flag is Clea
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BRVC - Branch if Overflow Cleared I
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BSET - Bit Set in SREG Description:
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CALL - Long Call to a Subroutine In
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CBR - Clear Bits in Register Instru
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CLH - Clear Half Carry Flag Descrip
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CLN - Clear Negative Flag Descripti
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CLS - Clear Signed Flag Description
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CLV - Clear Overflow Flag Descripti
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COM - One’s Complement Descriptio
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CPC - Compare with Carry Instructio
Page 55 and 56: CPSE - Compare Skip if Equal Instru
Page 57 and 58: EICALL - Extended Indirect Call to
Page 59 and 60: ELPM - Extended Load Program Memory
Page 61 and 62: ESPM - Extended Store Program Memor
Page 63 and 64: FMUL - Fractional Multiply Unsigned
Page 65 and 66: FMULSU - Fractional Multiply Signed
Page 67 and 68: IJMP - Indirect Jump Instruction Se
Page 69 and 70: INC - Increment Instruction Set Des
Page 71 and 72: LD - Load Indirect from data space
Page 73 and 74: LD (LDD) - Load Indirect from data
Page 75 and 76: LD (LDD) - Load Indirect From data
Page 77 and 78: LDI - Load Immediate Description: L
Page 79 and 80: LPM - Load Program Memory Instructi
Page 81 and 82: LSR - Logical Shift Right Instructi
Page 83 and 84: MOVW - Copy Register Word Instructi
Page 85 and 86: MULS - Multiply Signed Description:
Page 87 and 88: NEG - Two’s Complement Descriptio
Page 89 and 90: OR - Logical OR Instruction Set Des
Page 91 and 92: OUT - Store Register to I/O Locatio
Page 93 and 94: PUSH - Push Register on Stack Instr
Page 95 and 96: RET - Return from Subroutine Instru
Page 97 and 98: RJMP - Relative Jump Instruction Se
Page 99 and 100: ROR - Rotate Right through Carry In
Page 101 and 102: SBC - Subtract with Carry Instructi
Page 103 and 104: SBI - Set Bit in I/O Register Instr
Page 105: SBIS - Skip if Bit in I/O Register
Page 109 and 110: SBRS - Skip if Bit in Register is S
Page 111 and 112: SEH - Set Half Carry Flag Descripti
Page 113 and 114: SEN - Set Negative Flag Description
Page 115 and 116: SES - Set Signed Flag Description:
Page 117 and 118: SEV - Set Overflow Flag Description
Page 119 and 120: SLEEP Description: This instruction
Page 121 and 122: ST - Store Indirect From Register t
Page 123 and 124: ST (STD) - Store Indirect From Regi
Page 125 and 126: ST (STD) - Store Indirect From Regi
Page 127 and 128: STS - Store Direct to data space In
Page 129 and 130: SUBI - Subtract Immediate Instructi
Page 131 and 132: TST - Test for Zero or Minus Instru
Page 133: Atmel Headquarters Atmel Operations
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AVR Instruction Set Nomenclature: Status Register (SREG ...

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