AVR Instruction Set Nomenclature: Status Register (SREG ...
AVR Instruction Set Nomenclature: Status Register (SREG ...
AVR Instruction Set Nomenclature: Status Register (SREG ...
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BRLO - Branch if Lower (Unsigned)<br />
<strong>Instruction</strong> <strong>Set</strong><br />
Description:<br />
Conditional relative branch. Tests the Carry flag (C) and branches relatively to PC if C is set. If the instruction is executed<br />
immediately after any of the instructions CP, CPI, SUB or SUBI, the branch will occur if and only if the unsigned binary<br />
number represented in Rd was smaller than the unsigned binary number represented in Rr. This instruction branches relatively<br />
to PC in either direction (PC - 63 ≤ destination ≤ PC + 64). The parameter k is the offset from PC and is represented<br />
in two’s complement form. (Equivalent to instruction BRBS 0,k).<br />
Operation:<br />
(i) If Rd < Rr (C = 1) then PC ← PC + k + 1, else PC ← PC + 1<br />
Syntax: Operands: Program Counter:<br />
(i) BRLO k -64 ≤ k ≤ +63 PC ← PC + k + 1<br />
PC ← PC + 1, if condition is false<br />
16-bit Opcode:<br />
<strong>Status</strong> <strong>Register</strong> (<strong>SREG</strong>) and Boolean Formulae:<br />
Example:<br />
1111 00kk kkkk k000<br />
I T H S V N Z C<br />
- - - - - - - -<br />
eor r19,r19 ; Clear r19<br />
loop: inc<br />
...<br />
r19 ; Increase r19<br />
cpi r19,$10 ; Compare r19 with $10<br />
brlo loop ; Branch if r19 < $10 (unsigned)<br />
nop ; Exit from loop (do nothing)<br />
Words: 1 (2 bytes)<br />
Cycles: 1 if condition is false<br />
2 if condition is true<br />
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