AVR Instruction Set Nomenclature: Status Register (SREG ...

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SEI - Set Global Interrupt Flag Description: Sets the Global Interrupt flag (I) in SREG (status register). Operation: (i) I ← 1 Syntax: Operands: Program Counter: (i) SEI None PC ← PC + 1 112 16-bit Opcode: Status Register (SREG) and Boolean Formula: I: 1 Global Interrupt flag set Example: 1001 0100 0111 1000 I T H S V N Z C 1 - - - - - - - Words: 1 (2 bytes) Cycles: 1 cli ; Disable interrupts in r13,$16 ; Read Port B sei ; Enable interrupts Instruction Set
SEN - Set Negative Flag Description: Sets the Negative flag (N) in SREG (status register). Operation: (i) N ← 1 Syntax: Operands: Program Counter: (i) SEN None PC ← PC + 1 16-bit Opcode: Status Register (SREG) and Boolean Formula: N: 1 Negative flag set Example: 1001 0100 0010 1000 I T H S V N Z C - - - - - 1 - - Words: 1 (2 bytes) Cycles: 1 add r2,r19 ; Add r19 to r2 sen ; Set negative flag Instruction Set 113
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Instruction Set Nomenclature: Statu
Page 3 and 4:
Conditional Branch Summary Instruct
Page 5 and 6:
Instruction Set Summary (Continued)
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Instruction Set Summary (Continued)
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ADC - Add with Carry Description: A
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ADIW - Add Immediate to Word Instru
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ANDI - Logical AND with Immediate I
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BCLR - Bit Clear in SREG Descriptio
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BRBC - Branch if Bit in SREG is Cle
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BRCC - Branch if Carry Cleared Inst
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BREQ - Branch if Equal Instruction
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BRHC - Branch if Half Carry Flag is
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BRID - Branch if Global Interrupt i
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BRLO - Branch if Lower (Unsigned) I
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BRMI - Branch if Minus Instruction
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BRPL - Branch if Plus Instruction S
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BRTC - Branch if the T Flag is Clea
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BRVC - Branch if Overflow Cleared I
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BSET - Bit Set in SREG Description:
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CALL - Long Call to a Subroutine In
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CBR - Clear Bits in Register Instru
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CLH - Clear Half Carry Flag Descrip
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CLN - Clear Negative Flag Descripti
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CLS - Clear Signed Flag Description
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CLV - Clear Overflow Flag Descripti
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COM - One’s Complement Descriptio
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CPC - Compare with Carry Instructio
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CPSE - Compare Skip if Equal Instru
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EICALL - Extended Indirect Call to
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ELPM - Extended Load Program Memory
Page 61 and 62: ESPM - Extended Store Program Memor
Page 63 and 64: FMUL - Fractional Multiply Unsigned
Page 65 and 66: FMULSU - Fractional Multiply Signed
Page 67 and 68: IJMP - Indirect Jump Instruction Se
Page 69 and 70: INC - Increment Instruction Set Des
Page 71 and 72: LD - Load Indirect from data space
Page 73 and 74: LD (LDD) - Load Indirect from data
Page 75 and 76: LD (LDD) - Load Indirect From data
Page 77 and 78: LDI - Load Immediate Description: L
Page 79 and 80: LPM - Load Program Memory Instructi
Page 81 and 82: LSR - Logical Shift Right Instructi
Page 83 and 84: MOVW - Copy Register Word Instructi
Page 85 and 86: MULS - Multiply Signed Description:
Page 87 and 88: NEG - Two’s Complement Descriptio
Page 89 and 90: OR - Logical OR Instruction Set Des
Page 91 and 92: OUT - Store Register to I/O Locatio
Page 93 and 94: PUSH - Push Register on Stack Instr
Page 95 and 96: RET - Return from Subroutine Instru
Page 97 and 98: RJMP - Relative Jump Instruction Se
Page 99 and 100: ROR - Rotate Right through Carry In
Page 101 and 102: SBC - Subtract with Carry Instructi
Page 103 and 104: SBI - Set Bit in I/O Register Instr
Page 105 and 106: SBIS - Skip if Bit in I/O Register
Page 107 and 108: SBR - Set Bits in Register Instruct
Page 109 and 110: SBRS - Skip if Bit in Register is S
Page 111: SEH - Set Half Carry Flag Descripti
Page 115 and 116: SES - Set Signed Flag Description:
Page 117 and 118: SEV - Set Overflow Flag Description
Page 119 and 120: SLEEP Description: This instruction
Page 121 and 122: ST - Store Indirect From Register t
Page 123 and 124: ST (STD) - Store Indirect From Regi
Page 125 and 126: ST (STD) - Store Indirect From Regi
Page 127 and 128: STS - Store Direct to data space In
Page 129 and 130: SUBI - Subtract Immediate Instructi
Page 131 and 132: TST - Test for Zero or Minus Instru
Page 133: Atmel Headquarters Atmel Operations
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AVR Instruction Set Nomenclature: Status Register (SREG ...

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