AVR Instruction Set Nomenclature: Status Register (SREG ...
AVR Instruction Set Nomenclature: Status Register (SREG ...
AVR Instruction Set Nomenclature: Status Register (SREG ...
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TST - Test for Zero or Minus<br />
<strong>Instruction</strong> <strong>Set</strong><br />
Description:<br />
Tests if a register is zero or negative. Performs a logical AND between a register and itself. The register will remain<br />
unchanged.<br />
Operation:<br />
(i) Rd ← Rd • Rd<br />
Syntax: Operands: Program Counter:<br />
(i) TST Rd 0 ≤ d ≤ 31 PC ← PC + 1<br />
16-bit Opcode: (see AND Rd, Rd)<br />
0010 00dd dddd dddd<br />
<strong>Status</strong> <strong>Register</strong> and Boolean Formula:<br />
I T H S V N Z C<br />
- - - ⇔ 0 ⇔ ⇔ -<br />
S: N ⊕ V, For signed tests.<br />
V: 0<br />
Cleared<br />
N: R7<br />
<strong>Set</strong> if MSB of the result is set; cleared otherwise.<br />
Z: R7• R6 •R5• R4• R3 •R2• R1• R0<br />
<strong>Set</strong> if the result is $00; cleared otherwise.<br />
R (Result) equals Rd.<br />
Example:<br />
tst r0 ; Test r0<br />
breq<br />
...<br />
zero ; Branch if r0=0<br />
zero: nop ; Branch destination (do nothing)<br />
Words: 1 (2 bytes)<br />
Cycles: 1<br />
131
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