AVR Instruction Set Nomenclature: Status Register (SREG ...
AVR Instruction Set Nomenclature: Status Register (SREG ...
AVR Instruction Set Nomenclature: Status Register (SREG ...
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ADIW - Add Immediate to Word<br />
<strong>Instruction</strong> <strong>Set</strong><br />
Description:<br />
Adds an immediate value (0-63) to a register pair and places the result in the register pair. This instruction operates on the<br />
upper four register pairs, and is well suited for operations on the pointer registers.<br />
Operation:<br />
(i) Rd+1:Rd ← Rd+1:Rd + K<br />
Syntax: Operands: Program Counter:<br />
(i) ADIW Rd,K d ∈ {24,26,28,30}, 0 ≤ K ≤ 63 PC ← PC + 1<br />
16-bit Opcode:<br />
1001 0110 KKdd KKKK<br />
<strong>Status</strong> <strong>Register</strong> (<strong>SREG</strong>) and Boolean Formulae:<br />
I T H S V N Z C<br />
- - - ⇔ ⇔ ⇔ ⇔ ⇔<br />
S: N ⊕ V, For signed tests.<br />
V: Rdh7 • R15<br />
<strong>Set</strong> if two’s complement overflow resulted from the operation; cleared otherwise.<br />
N: R15<br />
<strong>Set</strong> if MSB of the result is set; cleared otherwise.<br />
Z: R15 •R14 •R13 •R12 •R11 •R10 •R9 •R8 •R7• R6• R5• R4• R3• R2 •R1• R0<br />
<strong>Set</strong> if the result is $0000; cleared otherwise.<br />
C: R15 • Rdh7<br />
<strong>Set</strong> if there was carry from the MSB of the result; cleared otherwise.<br />
R (Result) equals Rdh:Rdl after the operation (Rdh7-Rdh0 = R15-R8, Rdl7-Rdl0=R7-R0).<br />
Example:<br />
adiw r24,1 ; Add 1 to r25:r24<br />
adiw r30,63 ; Add 63 to the Z pointer(r31:r30)<br />
Words: 1 (2 bytes)<br />
Cycles: 2<br />
11
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