Elektronika 2010-11.pdf - Instytut Systemów Elektronicznych ...

Nonlinear compact thermal model of SiC power
semiconductor devices
(Nieliniowy skupiony model termiczny półprzewodnikowych elementów
mocy wykonanych z węglika krzemu)
dr hab. inż. KRZYSZTOF GÓRECKI, prof. dr hab. inż. JANUSZ ZARĘBSKI,
mgr inż. DAMIAN BISEWSKI, dr inż. JACEK DĄBROWSKI
Akademia Morska w Gdyni, Katedra Elektroniki Morskiej
Abstraction of the heat dissipated in semiconductor devices
depends generally on three phenomena: conduction, convection
and radiation [1, 2]. One of these mechanisms can be
dominant depending on the inner temperature T j
of the chip
and on the difference of the temperatures between the device
case and the surrounding [1].
In modeling of the device cooling the microscopic or macroscopic
thermal models are used [2, 3]. In the microscopic
models the space distribution of the temperature in the chip is
considered. Unfortunately, these models are complex, therefore
they need a long time of calculations and practically they
can be only used for an analysis of thermal properties of the
chip of the discrete semiconductor devices [4, 5]. On the other
hand, the compact thermal models are willingly used in the
analysis of electronic circuits [6, 7, 8].
The compact thermal models describe the difference between
the device inner temperature (corresponding to one or
a few selected points) and the ambient temperature T a
generally
expressed by the convolution of the thermal power p th
dissipated in the device and the derivative of the transient
thermal impedance Z(t) of the device [9]. In the static (d.c.)
conditions the difference of the temperatures T j
and T a
is equal
to the product of the power p th
(the constant value) and the
thermal resistance R th
. The parameter R th
corresponds to the
value of Z(t) in the thermal steady-state.
The device compact thermal model instead of the convolution
integral is very often formulated as an equivalent electrical
circuit of the form of the Cauer [10] or the Foster [3, 4,
6, 7, 11] networks representing the device transient thermal
impedance, excited by the current source of the efficiency corresponding
to the power dissipated in the device [5, 7, 10].
As it results from, e.g. [8, 10], both the network constructions
of the thermal model (Fig. 1) are fully equivalent from
the point of view of the terminal T j
, but the Foster network
has no direct physical interpretation, whereas the Cauer network
results directly from dyscretization of the one-dimensional
heat transfer equation. The values of the RC parameters
existing in the considered networks can be estimated with the
use of specialist methods or algorithms, e.g. the algorithm
ESTYM [11].
a)
R 1 R 2 Foster R n
T j T a
p th
C 1
C 2 C n T a
Fig. 1. Device thermal models based on the Foster (a) and the Cauer (b) network
Rys. 1. Modele termiczne elementów półprzewodnikowych bazujące na sieci
Fostera (a) i Cauera (b)
b)
The compact thermal models presented in the literature
are linear models; that means the influence of the device inner
temperature on the efficiency of the heat abstraction is
not included in these models. On the other hand, as it results
from the authors’ investigations [12–14] the thermal resistance
and the transient thermal impedance of the device strongly
depend on the device dissipated power – consequently on the
device inner temperature.
In the paper the compact nonlinear thermal model of modern
SiC devices is proposed. This model was experimentally
verified for SiC-MESFET and SiC-SBR (Schottky Barrier Rectifier).
The form of the nonlinear thermal model
As it results from the measurements of the transient thermal
impedance of any device [11, 12], the course of Z(t) depends,
among others on the device dissipated power, which means
that the values of the parameters (RC elements) existing in
the considered models have to depend on the power.
This phenomenon is proved by the measurements and the
use of the algorithm ESTYM [11]. So, to estimate correctly the
device inner temperature the nonlinear compact thermal model
with RC parameters depending on the dissipated power
has to be formulated.
In order to obtain it, five following stages have to be performed:
a) in the first stage the device transient thermal impedance
in the wide range of the dissipated power should be measured.
Note, that the lowest power value should cause
the device junction temperature to increase so high as to
secure the correct accuracy of the measurements. On the
other hand, at the highest value of the dissipated power
the inner temperature cannot exceed the maximum allowable
device temperature given in the catalogue;
b) in the second stage of this procedure, the values of the
elements R i
,C i
(Cauer network) are estimated with the
use of the algorithm ESTYM at various values of the power.
The Cauer network is chosen because of its physical
origin;
c) in the third stage the dependence
R i
(p th
) and C i
(p th
) are drafted. Then,
Cauer R' 1 R' 2 R' n
T j T a
p th C' 1 C' 2 C' n
T a
on the basis of these dependences,
the proper approximation function is
fitted;
d) in the fourth stage the values of the
parameters existing in the dependences
C i
(p th
) and R i
(p th
) are estimated;
e) in the last stage the proper model
of the network form (see Fig. 2) is formulated
and implemented to SPICE.
Elektronika 11/2010