SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64 ...
SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64 ...
SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64 ...
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NXP Semiconductors<br />
<strong>SC16IS740</strong>/<strong>750</strong>/<strong>760</strong><br />
<strong>Single</strong> <strong>UART</strong> <strong>with</strong> I 2 C-<strong>bus</strong>/<strong>SPI</strong> <strong>interface</strong>, <strong>64</strong>-byte FIFOs, IrDA SIR<br />
8.7 Modem Status Register (MSR)<br />
This 8-bit register provides information about the current state of the control lines from the<br />
modem, data set, or peripheral device to the host. It also indicates when a control input<br />
from the modem changes state. Table 18 shows Modem Status Register bit settings.<br />
Table 18.<br />
Modem Status Register bits description<br />
Bit Symbol Description<br />
7 MSR[7] CD [1] (active HIGH, logical 1). If GPIO6 is selected as CD modem pin<br />
through IOControl register bit 1, the state of CD pin can be read from this<br />
bit. This bit is the complement of the CD input. Reading IOState bit 6 does<br />
not reflect the true state of CD pin.<br />
6 MSR[6] RI [1] (active HIGH, logical 1). If GPIO7 is selected as RI modem pin through<br />
IOControl register bit 1, the state of RI pin can be read from this bit. This bit<br />
is the complement of the RI input. Reading IOState bit 6 does not reflect the<br />
true state of RI pin.<br />
5 MSR[5] DSR [1] (active HIGH, logical 1). If GPIO4 is selected as DSR modem pin<br />
through IOControl register bit 1, the state of DSR pin can be read from this<br />
bit. This bit is the complement of the DSR input. Reading IOState bit 4 does<br />
not reflect the true state of DSR pin.<br />
4 MSR[4] CTS (active HIGH, logical 1). This bit is the complement of the CTS input.<br />
3 MSR[3] ∆CD [1] . Indicates that CD input has changed state. Cleared on a read.<br />
2 MSR[2] ∆RI [1] . Indicates that RI input has changed state from LOW to HIGH.<br />
Cleared on a read.<br />
1 MSR[1] ∆DSR [1] . Indicates that DSR input has changed state. Cleared on a read.<br />
0 MSR[0] ∆CTS. Indicates that CTS input has changed state. Cleared on a read.<br />
[1] Only available on SC16IS<strong>750</strong>/SC16IS<strong>760</strong>.<br />
Remark: The primary inputs RI, CD, CTS, DSR are all active LOW.<br />
<strong>SC16IS740</strong>_<strong>750</strong>_<strong>760</strong>_6<br />
© NXP B.V. 2008. All rights reserved.<br />
Product data sheet Rev. 06 — 13 May 2008 28 of 62