SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64 ...

NXP Semiconductors
SC16IS740/750/760
Single UART with I 2 C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
19. Revision history
Table 44.
Revision history
Document ID Release date Data sheet status Change notice Supersedes
SC16IS740_750_760_6 20080513 Product data sheet - SC16IS740_750_760_5
Modifications: • Figure 24 “SPI operation” updated; added Figure note [1] and Figure note [2]
• Table 37 “I 2 C-bus timing specifications [1] ”:
– added specification t w(rst)
– updated Table note [1]
– Table note [4]: changed from “X1” to “XTAL1”
• Figure 25 “SCL delay after reset” updated; added timing t w(rst)
• Table 39 “SC16IS740/750 SPI-bus timing specifications” updated; added specification t w(rst)
• Figure 34 “Detailed SPI-bus timing” updated; adjusted timing t CSH
• Table 40 “SC16IS760 SPI-bus timing specifications”:
– added specification t w(rst)
– t CSH(min) changed from “20 ns” to “5 ns” (for both 2.5 V and 3.3 V V DD voltages)
• updated SMD package soldering information
SC16IS740_750_760_5 20061116 Product data sheet - SC16IS740_750_760_4
SC16IS740_750_760_4 20061030 Product data sheet - SC16IS740_750_760_3
SC16IS740_750_760_3 20060522 Product data sheet - SC16IS740_750_760_2
SC16IS740_750_760_2 20060330 Product data sheet - SC16IS740_750_760_1
SC16IS740_750_760_1
(9397 750 14832)
20060104 Product data sheet - -
SC16IS740_750_760_6
© NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 13 May 2008 60 of 62