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TELE-X - a Satellite System for TV and Data Communication ...

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42<br />

Fig. 8<br />

The frame structure <strong>for</strong> multiplexer ZAH 45/140-1<br />

FAW Frame alignment word (111110100000)<br />

ABC Bits belonging to the tributaries A. B, C<br />

C,. Control bits tor pulse stuffing<br />

I Alarm bit<br />

F Bits <strong>for</strong> optional use<br />

This should be compared with the<br />

printed board assemblies with discrete<br />

components, where each printed board<br />

was only able to house the equipment<br />

<strong>for</strong> a single tributary.<br />

ZAH 45/140-1<br />

The digital multiplexer ZAH45/140-1<br />

converts three 45 Mbit/s (DS3) signals to<br />

a 140 Mbit/s (DS3E) signal corresponding<br />

to level 4 in the European hierarchy,<br />

<strong>and</strong> vice versa. No definite st<strong>and</strong>ard has<br />

been established <strong>for</strong> the frame structure<br />

of this multiplexer. The chosen frame is<br />

identical to that used by AT&T The<br />

frame structure is shown in fig. 8. The<br />

interfaces meet the requirements of<br />

CCITT Recommendation G.703 <strong>and</strong><br />

AT&T Technical Advisory No. 34.<br />

The function of the multiplexer is illustrated<br />

by the block diagram of fig.9.<br />

The function issimilarto that of ZAH 1.5/<br />

45-1.<br />

Emitter-coupled logic (ECL) has been<br />

used to obtain sufficient reliability at the<br />

high bit rates (^45 Mbit/s). The ECL circuits<br />

have excellent transmission<br />

characteristics at high bit rates. Un<strong>for</strong>tunately<br />

they have a high power consumption,<br />

so that ECL is only used in the<br />

transmission path, while the control in<strong>for</strong>mation<br />

is processed in TTL circuits,<br />

containing low-power Schottky circuits.<br />

Moreover the data flow is processed in<br />

parallel <strong>for</strong>m, which means that the<br />

highest bit rate in the magazine is<br />

45 Mbit/s. This design has been op-<br />

Fig. 9<br />

Block diagram of multiplexer ZAH 45/140-1

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