DDR3 RDIMMs Channel - Micron

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• For DDR3, the address/command and control are designed to operate up to 800Mbps (DDR3-1600) 4/12/2007 26 ©2007 Micron Technology, Inc. All rights reserved. Comparison of Tree to Fly-By Fly-By Topology (Only)
• Typical frequency response for: dB(U6) 0 -10 -20 -30 -40 -50 Tree Topology m1 m2 freq= 234.0MHz freq= 333.0MHz dB(U6)=-12.608 dB(U6)=-18.900 INDEX2=0.000000 INDEX2=0.000000 4/12/2007 27 ©2007 Micron Technology, Inc. All rights reserved. Comparison of Tree to Fly-By m1 m2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 freq, GHz dB(D0) 0 -10 -20 -30 -40 Fly-By Topology m3 freq= 801.0MHz dB(D0)=-7.342 INDEX1=0.000000 m1 m2 freq= 372.0MHz freq= 537.0MHz dB(D0)=-6.137 dB(D0)=-9.577 INDEX1=0.000000 INDEX1=0.000000 m1 m2 m3 -50 0.0 0.5 1.0 1.5 2.0 2.5 3.0 freq, GHz
Page 1 and 2: 4/12/2007 DDR3 RDIMMs Channel Basic
Page 3 and 4: 4/12/2007 DDR3 RDIMM Basics and Int
Page 5 and 6: 4/12/2007 5 ©2007 Micron Technolog
Page 7 and 8: Improved Termination for Post-Regis
Page 9 and 10: 4/12/2007 9 ©2007 Micron Technolog
Page 11 and 12: Improvements to the Data Channel
Page 13 and 14: 4/12/2007 13 ©2007 Micron Technolo
Page 17 and 18: • Controller Break out Impedance
Page 19 and 20: • Ron Nominal Drive strength in o
Page 21 and 22: • Typical RDIMM spacing (UDIMM) T
Page 25: • Address data eye diagrams at th
Page 29 and 30: 4/12/2007 DDR3 RDIMM Topology, Simu
Page 31 and 32: Pre Register Address Timing Example
Page 33 and 34: Post Register Address Timing Exampl
Page 41 and 42: 4/12/2007 DDR3 RDIMM Topology, Simu
Page 49 and 50: DRAM On-Die-Termination (ODT) sugge
Page 51 and 52: • WRITEs at DDR3-1066 4/12/2007 5

DDR3 RDIMMs Channel - Micron

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