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Fast Models Reference Manual - ARM Information Center

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Accuracy and Functionality2.1 Model Capabilities Overview<strong>Fast</strong> <strong>Models</strong> attempt to accurately model the hardware, but compromises exist between speedof execution, accuracy and other criteria. This means that a processor model might not beexpected to match the hardware under certain conditions.For a detailed description of timing, bus and cache modeling limitations see Functional cachesin <strong>Fast</strong> <strong>Models</strong> on page 2-3 and How Accurate are <strong>Fast</strong> <strong>Models</strong>? on page 2-5.2.1.1 What <strong>Fast</strong> <strong>Models</strong> can do<strong>Fast</strong> <strong>Models</strong> do:• Instruction accurate modeling• Correct execution of architecturally-correct code.2.1.2 What <strong>Fast</strong> <strong>Models</strong> cannot do<strong>Fast</strong> <strong>Models</strong> cannot be used to:• Validate the hardware• Model unpredictable behavior• Model cycle counting• Model timing sensitive behavior• Model SMP instruction scheduling• Model software performance• Model bus traffic.<strong>ARM</strong> DUI 0423N Copyright © 2008-2012 <strong>ARM</strong>. All rights reserved. 2-2ID120712Non-Confidential

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