Fast Models Reference Manual - ARM Information Center

More documents

Recommendations

Info

Framework Protocols3.1 About the framework and protocolsThis section describes the common protocols and components provided by the Fast Modelsframework. These are:• Signaling protocols• Clocking components and protocols• Debug interface protocols.Programmer’s View (PV) models of processors and devices work at a level where functionalbehavior matches what can be observed from software. Accuracy in timing is sacrificed toachieve fast simulation speeds.3.1.1 Signaling protocolsThe signaling protocols are very simple protocols used by many components to indicate changesin state for signals such as interrupt and reset. There are two variants of each signaling protocol:• one that permits components to signal a state change to other components• one that permits the other components to passively query the current state of the signal.3.1.2 Clocking components and protocolsThe clocking components and protocols provide a mechanism for systems to regulate theexecution rate of components within a system. Clocking includes the concept of clock rates,dividers to change clock rates, and timers to generate callbacks based on those clock rates.If the MasterClock component is instantiated in a system, it provides a consistent master clockrate. Although this rate is not defined, you can consider this to be 1Hz. ClockDividercomponents are able to convert this clock rate into a new rate using a multiplier and divider. Youcan cascade ClockDivider components to produce many different clock rates within a system.The maximum ratio of any two clocks in the system must be less than 2 32 .ClockTimer components can be instantiated by a component and connected to any MasterClockor ClockDivider output. The ClockTimer can then be used to generate callbacks after a givennumber of ticks of that clock. The ClockTimer can invoke a behavior on the component topermit the component to perform work. The component can then request the ClockTimer torepeat its count.All clocking components that communicate use an opaque ClockSignal protocol. ClockSignalprotocols have no behaviors that can be invoked by the user.3.1.3 Debug interface protocolsLISA components can expose aspects of their internal state to a debugger so that they becomevisible and usable in the debugger. Some aspects are supported by the native LISA language,and some are supported by debug interface protocols. For more information, see Debuginterface protocols on page 3-10.ARM DUI 0423N Copyright © 2008-2012 ARM. All rights reserved. 3-2ID120712Non-Confidential
Framework Protocols3.2 Signaling ProtocolsThis section describes the common signaling protocols within the Fast Models Portfolio. Itcontains the following sections:• Signal protocol• StateSignal protocol• Value protocol• ValueState protocol.3.2.1 Signal protocolThe Signal protocol has the following behavior:setValue(enum sg::Signal::State) : voidindicates a state change.Legal values for sg::Signal::State are:• sg::Signal::Set• sg::Signal::Clear3.2.2 StateSignal protocolThe StateSignal protocol has two behaviors:setValue(enum sg::Signal::State) : voidindicates a value changegetValue() : sg::Signal::Statereads the current value.3.2.3 Value protocolThe Value protocol has the following behavior:setValue(uint32_t value)indicates a state change.3.2.4 ValueState protocolThe ValueState protocol has the following behaviors:setValue(uint32_t value) : voidindicates a value changegetValue() : uint32_tread the current value state.ARM DUI 0423N Copyright © 2008-2012 ARM. All rights reserved. 3-3ID120712Non-Confidential
Page 1 and 2: Fast ModelsVersion 8.0Reference Man
Page 3 and 4: ContentsFast Models Reference Manua
Page 5 and 6: PrefaceThis preface introduces the
Page 7 and 8: PrefaceConventionsConventions that
Page 9 and 10: Preface• PrimeCell Generic Interr
Page 11 and 12: Chapter 1IntroductionThis chapter i
Page 13 and 14: Chapter 2Accuracy and Functionality
Page 15 and 16: Accuracy and Functionality2.2 Funct
Page 17 and 18: Accuracy and Functionality2.3 How A
Page 20 and 21: Accuracy and FunctionalityFast Mode
Page 24 and 25: Framework Protocols3.3 Clocking com
Page 26 and 27: Framework ProtocolsParametersTable
Page 28 and 29: Framework ProtocolsVerification and
Page 30 and 31: Framework Protocols3.4 Debug interf
Page 32 and 33: Framework Protocols}}// ...The foll
Page 34 and 35: Chapter 4Processor ComponentsThis c
Page 36 and 37: Processor Components4.1 About the C
Page 38 and 39: Processor ComponentsTable 4-1 ARMCo
Page 40 and 41: Processor ComponentsTable 4-3 provi
Page 42 and 43: Processor ComponentsThe debugger mi
Page 44 and 45: Processor Components4.3.1 PortsTabl
Page 48 and 49: Processor Components4.3.6 Debug fea
Page 50 and 51: Processor Components4.4 ARMCortexA9
Page 54 and 55: Processor Components4.4.4 Registers
Page 58 and 59: Processor ComponentsTable 4-11 ARMC
Page 62 and 63: Processor Components4.6.3 Parameter
Page 64 and 65: Processor Componentsa. The ase-pres
Page 72 and 73:
Processor Components4.7.9 Library d
Page 74 and 75:
Processor Components4.8.2 Additiona
Page 76 and 77:
Processor Components4.8.4 Registers
Page 78 and 79:
Processor Components4.9 ARMCortexR7
Page 80 and 81:
Processor ComponentsTable 4-21 ARMC
Page 82 and 83:
Page 84 and 85:
Processor Components• The GIC doe
Page 86 and 87:
Processor ComponentsName Port Proto
Page 88 and 89:
Page 90 and 91:
Page 92 and 93:
Processor Components4.11 ARMCortexR
Page 94 and 95:
Page 96 and 97:
Processor Components4.11.8 Performa
Page 98 and 99:
Processor ComponentsName Port proto
Page 100 and 101:
Processor ComponentsBreakpointsTher
Page 102 and 103:
Processor Components4.13 ARMCortexM
Page 104 and 105:
Page 106 and 107:
Processor ComponentsROM table to be
Page 108 and 109:
Processor ComponentsTable 4-33 ARMA
Page 110 and 111:
Processor Components• Semihosting
Page 112 and 113:
Processor ComponentsTable 4-36 Memo
Page 114 and 115:
Processor ComponentsThe parameters
Page 116 and 117:
Processor ComponentsTable 4-40 Proc
Page 118 and 119:
Processor ComponentsRegistersAll pr
Page 120 and 121:
Processor Components4.15 ARM1176CTF
Page 122 and 123:
Processor Componentsa. Specifying f
Page 124 and 125:
Processor Components4.16 ARM1136CTF
Page 126 and 127:
Processor Componentsa. Specifying f
Page 128 and 129:
Processor Components4.17 ARM968CTFi
Page 130 and 131:
Processor Components• integration
Page 132 and 133:
Processor Components4.17.9 Differen
Page 134 and 135:
Processor ComponentsTable 4-51 ARM9
Page 136 and 137:
Processor Components4.19 Implementa
Page 138 and 139:
Processor Components• TLB Lockdow
Page 140 and 141:
Processor Components4.20 Processor
Page 142 and 143:
Processor Components4.22 Additional
Page 144 and 145:
Peripheral and Interface Components
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
Page 152 and 153:
Page 154 and 155:
Page 156 and 157:
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
Page 168 and 169:
Page 170 and 171:
Page 172 and 173:
Page 174 and 175:
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Page 188 and 189:
Page 190 and 191:
Page 192 and 193:
Page 194 and 195:
Page 196 and 197:
Page 198 and 199:
Page 200 and 201:
Page 202 and 203:
Page 204 and 205:
Page 206 and 207:
Page 208 and 209:
Page 210 and 211:
Page 212 and 213:
Page 214 and 215:
Page 216 and 217:
Page 218 and 219:
Page 220 and 221:
Page 222 and 223:
Page 224 and 225:
Page 226 and 227:
Page 228 and 229:
Page 230 and 231:
Page 232 and 233:
Page 234 and 235:
Page 236 and 237:
Page 238 and 239:
Page 240 and 241:
Page 242 and 243:
Page 244 and 245:
Page 246 and 247:
Page 248 and 249:
Page 250 and 251:
Page 252 and 253:
Page 254 and 255:
Page 256 and 257:
Page 258 and 259:
Page 260 and 261:
Page 262 and 263:
Page 264 and 265:
Page 266 and 267:
Page 268 and 269:
Page 270 and 271:
Page 272 and 273:
Page 274 and 275:
Page 276 and 277:
Page 278 and 279:
Page 280 and 281:
Page 282 and 283:
Page 284 and 285:
Page 286 and 287:
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Page 298 and 299:
Page 300 and 301:
Page 302 and 303:
Page 304 and 305:
Page 306 and 307:
Page 308 and 309:
Page 310 and 311:
Page 312 and 313:
Page 314 and 315:
Page 316 and 317:
Page 318 and 319:
Page 320 and 321:
Page 322 and 323:
Page 324 and 325:
Page 326 and 327:
Page 328 and 329:
Page 330 and 331:
Page 332 and 333:
Page 334 and 335:
Chapter 6Versatile Express Model: P
Page 336 and 337:
Versatile Express Model: Platform a
Page 338 and 339:
Page 340 and 341:
Page 342 and 343:
Page 344 and 345:
Page 346 and 347:
Page 348 and 349:
Page 350 and 351:
Page 352 and 353:
Chapter 7Emulation Baseboard Model:
Page 354 and 355:
Emulation Baseboard Model: Platform
Page 356 and 357:
Page 358 and 359:
Page 360 and 361:
Page 362 and 363:
Page 364 and 365:
Page 366 and 367:
Page 368 and 369:
Page 370 and 371:
Page 372 and 373:
Page 374 and 375:
Page 376 and 377:
Page 378 and 379:
Microcontroller Prototyping System:
Page 380 and 381:
Page 382 and 383:
Page 384 and 385:
Page 386 and 387:
Page 388 and 389:
Page 390 and 391:
Page 392 and 393:
Page 394 and 395:
AEM ARMv7-A specificsA.1 Boundary f
Page 396 and 397:
AEM ARMv7-A specificsTable A-1 show
Page 398 and 399:
AEM ARMv7-A specificsWhen stepping
Page 400 and 401:
AEM ARMv7-A specificsA.2 Debug arch
Page 402 and 403:
AEM ARMv7-A specificsA.3 IMPLEMENTA
Page 404:
AEM ARMv7-A specificsA.4 TraceThe A
show all

Fast Models Reference Manual - ARM Information Center

Create successful ePaper yourself

Delete template?

Save as template?