Intel® Desktop Board DG41RQ Technical Product Specification

Error Messages and Beep CodesTable 39. Port 80h POST CodesPOST Code Description of POST OperationHost Processor10 Power-on initialization of the host processor (Boot Strap Processor)11 Host processor Cache initialization (including APs)12 Starting Application processor initialization13 SMM initializationChipset21 Initializing a chipset componentMemory22 Reading SPD from memory DIMMs23 Detecting presence of memory DIMMs24 Programming timing parameters in the memory controller and the DIMMs25 Configuring memory26 Optimizing memory settings27 Initializing memory, such as ECC init28 Testing memoryPCI Bus50 Enumerating PCI busses51 Allocating resources to PCI bus52 Hot Plug PCI controller initialization53 – 57 Reserved for PCI BusUSB58 Resetting USB bus59 Reserved for USBATA/ATAPI/SATA5AResetting PATA/SATA bus and all devices5BReserved for ATASMBus5CResetting SMBus5DReserved for SMBusLocal Console70 Resetting the VGA controller71 Disabling the VGA controller72 Enabling the VGA controllerRemote Console78 Resetting the console controller79 Disabling the console controller7AEnabling the console controllercontinued73