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Full-Custom Analog IC Design using Cadence DFII Virtuoso/Assura

Full-Custom Analog IC Design using Cadence DFII Virtuoso/Assura

Full-Custom Analog IC Design using Cadence DFII Virtuoso/Assura

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Creating an new library Using the library manager, create a new library by choosingFile→New→Library… from the menu. You are prompted to enter aname for your library : enter VLSITP. Below is a space to specify thedirectory where the data will be physically stored on the disk. Youdon’t have to change anything there. You will be prompted to attach atechnology file to the new library. Thetechnology file contains technologyspecificinformation, mostly related tolayout, and is provided by the foundrydesign kit. Select Attach to an existingtechfile and then choose the technology library TECH_C35B4.Creating cellviews Now create a cellview in your new library. Select VLSITP inthe Library field, and then choose File→New→CellView…from the menu. Enter test as the cell name, and schematic asthe view name.Notice the Tool field. When changing the tool, the viewname changes. This is because different tools areassociated with different views : schematic editor,symbol editor, layout editor (<strong>Virtuoso</strong>), etc… Eachview type has a standard name (i.e. schematic for acircuit schematic) but they can be changed.. It is however advised to keep the defaultnames to avoid problems. A cell named test is created, with one view named schematic, and the schematic editor appearsto edit your new cellview. Choose <strong>Design</strong>→Check And Save from the schematic editor menu, to have the cellview datawritten to the disk. Then close the schematic editor.Deleting, copying and renaming cellviews In the Library Manager, select the VLSITP library, then right-click on the testcell. In the context menu, choose Delete… then press OK. The cell is deleted withall its views. You can experiment with different commands such as copying, renaming anddeleting libraries, cells and views.5/23

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