LMX3160 Single Chip Radio Transceiver

Table II Mode Select Truth TableF1 F2 F3 F4 F6–F7 F8–F10Pre-scaler Mod Phase Det polarity I cpo D o TRI-STATE Power Down Modes CMOS Outputs0 3233 Negative LOW Normal Operation Powered UP LOW1 6465 Positive HIGH TRI-STATE Powered Down HIGHTABLE IIIa Power Down ModesFunction F15 F14Software Control 0 0Test Mode (See Note) 0 1Test Mode (See Note) 1 0Hardwire Power Down 1 1Note Not used in applicationTABLE IIIb Power Control ModesHighLowSoftware F6 Receiver Off Receiver OnControlF7 Transmitter Off Transmitter OnHardwire Rx PD Receiver Off Reciever OnControlTx PD Transmitter Off Transmitter OnPLDD PD PLL Off PLL OnTABLE IV Charge Pump Output Out 0 and FastLock DecodingF3 F12 F13 Function0 X 0 I cpo e 1X No FastLock Out 0 e F81 X 0 I cpo e 4X No FastLock Out 0 e F80 0 1 I cpo e 1X Manual FastLock Out 0 e FL o1 0 1 I cpo e 4X Manual FastLock Out 0 e FL oX 1 1 I cpo e Set by reference cycles present in F counter Auto FastLock Out 0 e FL oTABLE V FastLock Timeout Counter Value ProgrammingTime Out ( Reference Cycles) 8 24 40 56 72 88 104 120F16 0 1 0 1 0 1 0 1F17 0 0 1 1 0 0 1 1F18 0 0 0 0 1 1 1 1Example To set FastLock timeout for 24 reference cycles set F16 e HIGH F17 e LOW and F18 e LOW12