Test Cost
Test Cost
Test Cost
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설계에서의 test cost reduction• 충분한 설계 마진을 갖는 device를 설계• 설계에서의 안정화– SI/ PI board simulation (high speed device)– 설계 안정화 (floating node 제거 등)– IDD 산포 안정화를 위한 설계 변경 및 벡터 대응• 설계에서의 TCR– DFT의강화(Scan compression, At-speed MBIST with PLL)– Fault model ( stuck-at, t small delay transition, path delay, bridging i )– Concurrent <strong>Test</strong> Design– Loop-back test– MCP test mode 고려
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