Xilinx UG198 Virtex-5 FPGA RocketIO GTX Transceiver, User Guide

Ports and AttributesPorts and AttributesThe procedures for configuring and using each of the seven major blocks in theGTX_DUAL tile shown in Figure 1-3 are discussed in detail in the following sections:1. “Shared PMA PLL,” page 86 (Chapter 5)2. “Reset,” page 101 (Chapter 5)3. “Clocking,” page 96 (Chapter 5)4. “Power Control,” page 110 (Chapter 5)5. “Dynamic Reconfiguration Port,” page 117 (Chapter 5)6. “GTX Transmitter (TX),” page 119 (Chapter 6)7. “GTX Receiver (RX),” page 161 (Chapter 7)This section contains alphabetical tables of pins (Table 1-2), ports (Table 1-3 and Table 1-4),and attributes (Table 1-5 and Table 1-6). In all Port and Attribute tables in this guide, namesthat end with 0 are for the GTX0 transceiver on the tile, and names that end with 1 are forthe GTX1 transceiver. Names that do not end with 0 or 1 are shared.Table 1-2 lists alphabetically the signal names, directions, and descriptions of theGTX_DUAL analog pins, and provides links to their detailed descriptions.Table 1-2:GTX_DUAL Analog Pin SummaryPin Dir Description Section (Page)MGTAVCCIn (Pad)Analog supply for the internal analogcircuits of the GTX_DUAL tile.Analog DesignGuidelines (page 253)MGTAVCCPLLIn (Pad)Analog supply for the shared PMAPLL of the GTX_DUAL tile.Analog DesignGuidelines (page 253)MGTAVTTRXIn (Pad)Analog supply for the receivercircuits and the termination of theGTX_DUAL tile.Analog DesignGuidelines (page 253)MGTAVTTRXCIn (Pad)FXT only: Analog supply for theresistor calibration and the standbycircuit of the entire device.Analog DesignGuidelines (page 253)MGTAVTTRXC_RIn (Pad)TXT only: Analog supply for theresistor calibration and standbycircuits of the X1 column.Analog DesignGuidelines (page 254)MGTAVTTRXC_LIn (Pad)TXT only: Analog supply for theresistor calibration and standbycircuits of the X0 column.Analog DesignGuidelines (page 254)MGTAVTTTXIn (Pad)Analog supply for the transmittertermination and driver circuits andthe clock routing and muxingnetwork of the GTX_DUAL tile.Analog DesignGuidelines (page 254)MGTREFCLKPMGTREFCLKNIn (Pad)Differential clock input pin pair forthe reference clock of the GTX_DUALtile.Analog DesignGuidelines (page 254)MGTRREFIn (Pad)FXT only: Reference resistor input forthe entire device.Analog DesignGuidelines (page 254)RocketIO GTX Transceiver User Guide www.xilinx.com 29UG198 (v3.0) October 30, 2009