High-Performance SAB 80C517A/83C517A-5 8-Bit CMOS Single ...

SAB 80C517A/83C517A-5AC Characteristics (cont’d)Parameter Symbol Limit values Unit18 MHz clock Variable clock1/t CLCL = 3.5 MHz to 18 MHzmin. max. min. max.External Data Memory CharacteristicsRD pulse width t RLRH 233 – 6 t CLCL – 100 – nsWR pulse width t WLWH 233 – 6 t CLCL – 100 – nsAddress hold after ALE t LLAX2 81 – 2 t CLCL – 30 – nsRD to valid data in t RLDV – 128 – 5 t CLCL – 150 nsData hold after RD t RHDX 0 – 0 – nsData float after RD t RHDZ – 51 – 2 t CLCL –60 nsALE to valid data in t LLDV – 294 – 8 t CLCL – 150 nsAddress to valid data in t AVDV – 335 – 9 t CLCL – 165 nsALE to WR or RD t LLWL 117 217 3 t CLCL – 50 3 t CLCL +50 nsWR or RD high to ALEhight WHLH 16 96 t CLCL – 40 t CLCL +40 nsAddress valid to WR t AVWL 92 – 4 t CLCL – 130 – nsData valid to WRtransitiont QVWX 11 – t CLCL – 45 – nsData setup before WR t QVWH 239 – 7 t CLCL – 150 – nsData hold after WR t WHQX 16 – t CLCL – 40 – nsAddress float after RD t RLAZ – 0 – 0 nsSemiconductor Group 67