Ultra-Low-Power Digital Circuit Design - Microelectronic Systems ...

6 ConclusionThis work successfully demonstrated the design of a elliptic curve cryptographic core insubthreshold source-coupled logic using a top-down design ow. The ECC core runs correctlyat the specied frequency of 100 kHz.The comparison to a standard CMOS implementation of the same core shows, however,that in the current state, the STSCL library is not competitive in terms of power dissipation.The area required by the PMOS load devices and sizing constraints imposed by devicevariations make the STSCL standard cells considerably larger than their CMOS counterparts.On the system-level, this leads to an excessive amount of device and interconnectcapacitance.Advantages of STSCL over CMOS have been identied. The at power prole of STSCLcircuits makes it dicult to extract information on the data being processed by studyingthe supply current. This is an important advantage for cryptographic applications.31