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Tutorial for the Semi Custom Part of the Image Processing System

Tutorial for the Semi Custom Part of the Image Processing System

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2425 library ieee ;26 use ieee . std_logic_1164 . all ;2728 -- -----------------------------------------------------------------------------2930 entity histogram_top is3132 generic (33 WIDTH : positive := 320; -- width <strong>of</strong> frame34 HEIGHT : positive := 240; -- height <strong>of</strong> frame35 NBITS_PIXEL : positive := 8; -- bits per pixel36 NBITS_HISTOGRAM : positive := 18) ; -- bits <strong>for</strong> each histogram entry3738 port (39 signal clock : in std_logic ; -- clock40 signal reset : in std_logic ; -- reset41 signal frame_start : in std_logic ; -- frame start42 signal video_clock : in std_logic ; -- video clock43 signal video_in : in std_logic_vector ( NBITS_PIXEL - 1 downto 0); -- ↵digitised video signal44 signal done : out std_logic ; -- histogram done45 signal read_request : in std_logic ; -- read request <strong>for</strong> <strong>the</strong> histogram data46 signal address : in std_logic_vector ( NBITS_PIXEL - 1 downto 0); -- ↵address to read from47 signal data_out : out std_logic_vector ( NBITS_HISTOGRAM - 1 downto 0)); ↵-- output <strong>for</strong> histogram data4849 end entity histogram_top ;5051 -- -----------------------------------------------------------------------------5253 architecture structural <strong>of</strong> histogram_top is5455 signal ram_reset : std_logic ; -- reset <strong>for</strong> RAM56 signal ram_enable : std_logic ; -- enable signal <strong>for</strong> RAM57 signal ram_rw_select : std_logic ; -- read or write mode select <strong>for</strong> RAM58 signal ram_address : std_logic_vector ( NBITS_PIXEL - 1 downto 0); -- ↵address <strong>for</strong> RAM59 signal ram_data_in : std_logic_vector ( NBITS_HISTOGRAM - 1 downto 0); -- ↵data read from RAM60 signal ram_data_out : std_logic_vector ( NBITS_HISTOGRAM - 1 downto 0); -- ↵data written to RAM6162 begin -- architecture structural6364 histogram_1 : entity work . histogram65 generic map (66 WIDTH => WIDTH ,67 HEIGHT => HEIGHT ,68 NBITS_PIXEL => NBITS_PIXEL ,69 NBITS_HISTOGRAM => NBITS_HISTOGRAM )70 port map (71 clock => clock ,72 reset => reset ,73 frame_start => frame_start ,74 video_clock => video_clock ,75 video_in => video_in ,76 done => done ,77 read_request => read_request ,78 address => address ,79 data_out => data_out ,vlsi2semicustomtutorial.tex Rev: 3, March 27, 2007 11

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