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and 5. The purpose of the<br />

divide-by-ten prescaler is <strong>to</strong><br />

lower the vco fr equency a<br />

bit so that the programmabl<br />

e cou nter can f unction<br />

reliabl y. The output of the<br />

prescaler is 3.5 <strong>to</strong> 3.799<br />

MHz, and this feeds the<br />

programm able or divide-byn<br />

c o u nte r. I u se d a n<br />

MC12013P IC fo r th e divideby-t<br />

e n circ uit; however ,<br />

almost any prescaler IC wi ll<br />

work.<br />

Looki ng at the circ uit,<br />

transis<strong>to</strong>r Q1 buffers and<br />

am pl if ies the vco ou t put <strong>to</strong><br />

a sufficie nt level <strong>to</strong> ensure<br />

proper cou nti ng by the prescaler.<br />

Tra nsis<strong>to</strong>r Q1 has a<br />

f ixed gain of ten, and C15<br />

co uple s the desired amount<br />

of rf in<strong>to</strong> the MC12 013 P.<br />

About 0.8-vo lts p-p of rf is<br />

needed at pi n 15 of the<br />

12013P <strong>to</strong> ensure proper<br />

counting.<br />

T h e p rog r amm a bl e<br />

co unter has the responsibility<br />

o f di viding t he vco output<br />

in <strong>to</strong> 10-kH z increments<br />

over th e 299-channel range<br />

w hen the lo op is locked. To<br />

do t his, th e co unter has <strong>to</strong><br />

be designed <strong>to</strong> di vi de-by­<br />

3500-<strong>to</strong>-3799 in 299 steps.<br />

T he followi ng f o rm u l a<br />

shows ho w t he desir ed<br />

cou nter range was der ived:<br />

n (num ber counter d ivides<br />

b y ) i s equal t o : (3 .5<br />

MH z - 3.799 MHz )/1000<br />

Hz.<br />

Dividing eac h f requ ency<br />

by the 100D-Hz reference<br />

yields the desired coverage<br />

of the counter. The 100D-Hz<br />

f requen cy is th e ph ase<br />

detec<strong>to</strong>r sampling fre quency<br />

or ref er ence fr equency.<br />

A 1000-Hz ref erence is<br />

neede d at the phase det ec<strong>to</strong><br />

r <strong>to</strong> provide the 1D-kHz<br />

step at th e vco. This can be<br />

prove n, as fo llows. For the<br />

moment, assume th at the<br />

loop is locked and that the<br />

cou nte r is set at divide-by­<br />

3500. The vco f requ ency<br />

now equals: Fvco is eq ua l<br />

<strong>to</strong> (presca le r)(divid e-by -n<br />

numb er)(ph ase detec<strong>to</strong> r<br />

ref erence). Thi s yield s (10)<br />

(3500)(1 000), or 35 MHz.<br />

If t he pr og ramm ab le<br />

c<br />

., ,,, .oo<br />

- 1211 ( 13<br />

or<br />

.-----t---l~<br />

cte<br />

H<br />

or<br />

f--+-- +l<br />

3 .~ TO<br />

3.7 9 9 MH!<br />

1KHz<br />

P<br />

'" '"<br />

, 2: :5 4<br />

7' "<br />

.. ,J,<br />

3.3K<br />

~ 5V ~5V<br />

l1 :" ue<br />

f--­<br />

f-----<br />

. ..<br />

I Kll ( 15<br />

3 - 15<br />

" 2NJ 9 47<br />

'" roo<br />

4<br />

8 20 .01<br />

"" 1CI<br />

" 10 3 n I.<br />

".<br />

'"<br />

FIl O,", S WITCH DECOOER<br />

5 6 1 8<br />

"" 7<br />

f--­<br />

f--<br />

"<br />

p<br />

,<br />

l--1>--r1'O<br />

."<br />

'". ,<br />

Cl6 _511<br />

ur<br />

MC12 0 13 P ""IO<br />

Fig. 4. Phase detec<strong>to</strong>r, loop filter, reference fo r phase dete c<strong>to</strong>r, and veo prescaler.<br />

1 :. e<br />

_<br />

CLR<br />

C 0 C/ L<br />

e U 4 6<br />

eL K 7 4 19 6 (:2<br />

IO MH,<br />

a A aD<br />

ra<br />

COUNT LOAO<br />

3 112 SN741 4 of1--- - - - - + - -"'- --- = = = "'--- - - ---- - --'<br />

> ell z<br />

I.<br />

r I'<br />

·'511<br />

"<br />

" "<br />

ce<br />

.. ,<br />

"'<br />

'"<br />

2491( " .% ,~<br />

"<br />

ua ,<br />

IOOpF " 2491< 1% , L /Iol 308 ce<br />

•<br />

-" ." "<br />

cr<br />

,<br />

2 261< I'Jl. • 2. 2.."-<br />

ut<br />

/101(4044 cz<br />

IOO pF<br />

.. • cr<br />

• a , ~<br />

3. 3 1< 2201(<br />

.-<br />

." ••<br />

11:4 4 7<br />

2: 21' F· 1511<br />

." "<br />

9 10 I ' 12<br />

7\7 \<br />

rl :'. c<br />

_<br />

~<br />

ce cs<br />

, ." .r ." .r '" ." ." '" .or ."<br />

p p p p<br />

counte r is advanced <strong>to</strong><br />

3501, the vco fr equency<br />

now becomes Fvco is equa l<br />

<strong>to</strong> (10)(3501X1000) or 3501<br />

" 10 3 II II<br />

'Q:f<br />

e U!> 6<br />

CL ~ 7 419 6 C2<br />

IMHz<br />

CLR QA a D<br />

13 7 ~ 12<br />

f---<br />

Fig. 5. 3500 <strong>to</strong> 3799 programmab le d ivider.<br />

M Hz . The vco now has incre<br />

ased in frequency the<br />

desired 10 kH z, and it wi ll<br />

incr em en t 10 kH z each<br />

""<br />

IK," z TO<br />

P,"A SE<br />

OETECTOR<br />

F IG. 2<br />

time t he counte r is advanced<br />

o ne step.<br />

It should be appa rent<br />

that th e vc o reall y is give n<br />

73 Magazine . Oc<strong>to</strong>ber, 1980 213

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