Eric Vittoz - IEEE

TECHNICAL LITERATURE
History of the Development of Swiss Watch
Microprocessors
Christian Piguet, Member, IEEE, CSEM, Neuchâtel, Switzerland
Abstract
The history of watch microprocessors is very interesting;
on one hand microprocessors today are very
well-known and widely used in most personal computers,
PDA and self-phones, and on the other hand,
microprocessors for electronic watches are very different
from those used in personal computers. So the
history of the evolution of watch microprocessors has
been very different compared to the history of general
purpose microprocessors. In addition, this history
of watch microprocessors is a very “Swiss” or
“Neuchâtel” story, a completely unknown story, and
consequently an interesting piece for contributing to
the history of sciences and techniques.
Index Terms
Microprocessors, electronic watches, integrated circuits,
CMOS, history of sciences and techniques.
I. Introduction
The first microprocessor, called 4004, has been
designed and fabricated by Intel in 1971 [1-4]. But
some time was necessary to see this new component
go through Atlantic Ocean, also perhaps because Intel
has not fully understood what they have invented! In
1974, microprocessors became a hot topic in Europe,
resulting in many conferences and seminars. It is not
sure that speakers have really understood what they
were speaking about, and it was difficult to find in
their talks the simple and final truth, i.e. a microprocessor
was a very simple computer on a single
chip! It was nevertheless sure that non scientific people
did not understand a bit of microprocessors; to
announce a Workshop at EPFL, Switzerland, about
this topic, newspapers have written: “the arrival of
micro-compressors”! During such conferences, people
asked us frequently if microprocessors could be useful
for electronic watches. The answer was always:
“no, for what purpose?” It was true that at the time,
electronic watch circuits were simply a quartz oscillator
and a divider chain to produce a 1 Hz signal driving
a step motor. A microprocessor was not required
for such a task. The second reason was typically
Swiss: a very big tradition of secrecy in the Swiss
watch industry.
First Work about Watch Microprocessors
In 1975, at Neuchâtel, we were already thinking that
a microprocessor could be very useful for a watch. A
very small project was initiated at CEH (Centre Elec-
tronique Horloger) to discover what a microprocessor
was [5] and to evaluate if we could design such a
component. In 1978, a working group called « Processor
Group » is started with people from CEH (C.
Piguet, J-F. Perotto), University of Neuchâtel (J-J. Monbaron,
N. Péguiron), EPFL (E. Sanchez, A. Stauffer)
and from some Swiss watch companies (J-P. Wattenhofer,
Asulab). The goal of this Processor Group was
to propose many different watch microprocessor
architectures, aiming at very low power, and to compare
them. This work produced many original ideas
and microprocessor architectures, as it is reported in
many publications [6-12]. The proposed microprocessors
are very different form the conventional architectures
due to the requirements in terms of power consumption.
First, the proposed architectures are very
simple, and with less hardware, one can save some
power. By the way, we were very surprised to see
that conventional 8-bit Intel microprocessors have to
execute many instructions even for very simple tasks,
such a +1 in seconds register, +1 in minutes register
in case of overflow, +1 in hours register and so on.
Such a task required hundreds of executed instructions,
with a large penalty in power consumption.
Our conclusion was that such microprocessors were
too complicated for a watch microprocessor.
We were influenced by the work of Prof. Daniel
Mange at EPFL on Binary Decision Machines (BDM)
[13-15]. Such a machine has basically only two different
instructions, i.e. an if or a test instruction and
a do instruction. The test instruction allows testing
an input through the test multiplexer located at the
bottom of Fig. 1. If the input value is “1,” the binary
machine will execute a branch (or a jump), otherwise
the next instruction will be executed. The other
do instruction allows executing an operation, i.e. to
send a control word to an execution unit not shown
in Fig. 1. The instructions or the program are memorized
in a memory, which is generally a Read Only
Memory (ROM). The Program Counter (PC) is incremented
through a +1 incrementer (Fig. 1). The stack
allows implementing subroutines by memorizing the
return address on top of this stack. The binary decision
machines are in fact a “bridge” between
Boolean logic and very simple microprocessors. In
our case, they were very interesting for their performances
in low power consumption due to their
simplicity. Instead of having hundreds of instructions
executed for simple tasks, we will have only tens of
instructions.
50 IEEE SSCS NEWS © 2008 IEEE Summer 2008