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Lecture Notes in Computer Science 3472

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��s0� ,c=0.0<br />

s0<br />

en, on,<br />

{c := 0,<br />

s Asw := s 1 }<br />

s0<br />

en, on,<br />

{c := 0,<br />

sAsw := s1 }<br />

��s1� ,c=0.0<br />

�<br />

�<br />

8.0<br />

...<br />

en, on,<br />

{c := 0,<br />

s Asw := s 1 }<br />

8.5.2 Digitization<br />

d<br />

...<br />

8 Test Derivation from Timed Automata 225<br />

��s0� ,c=8.0<br />

s0<br />

en, on, {c := 0, s Asw := s 1 }<br />

�<br />

� �s1<br />

s0<br />

en, on, {c:= 0, s Asw := s 1 }<br />

5.0<br />

� �<br />

,c=d<br />

en, on, {c := 0, s Asw := s 1 }<br />

Fig. 8.10. Timed transition system Ms for Asw�Aen<br />

...<br />

� �s0<br />

s0<br />

d ′<br />

� �<br />

,c=−1<br />

��s1� ,c=5.0<br />

s0<br />

sw, off ,<br />

{c := −1<br />

s Asw := s 0 }<br />

Timed transition systems are not directly amenable to test<strong>in</strong>g. Besides their<br />

<strong>in</strong>f<strong>in</strong>iteness, TTS traces <strong>in</strong>clude some traces that cannot be observed, e.g. delays<br />

that are not followed by visible events. Furthermore, observable TTS traces<br />

do not conta<strong>in</strong> sufficient <strong>in</strong>formation to dist<strong>in</strong>guish between <strong>in</strong>put and output<br />

events.<br />

A testable timed transition systems is a TTS but also a (determ<strong>in</strong>istic)<br />

FSM. A TTTS Spec = 〈Q, L, −→, q0〉 uses a subset Q ⊂ QM of states of the<br />

orig<strong>in</strong>al TTS. Labels of the TTTS are timed event 4-tuples (d, io, a, r) with<br />

discrete delay d ∈ N, io ∈{<strong>in</strong>p, out}, anda and r as <strong>in</strong> M . It is derived from a<br />

TTS M execut<strong>in</strong>g the follow<strong>in</strong>g steps:<br />

(1) Digitize clocks: Eachtimedtrace with times <strong>in</strong> R ≥0 is mapped onto a set of<br />

traces with times <strong>in</strong> Z. For each reachable state q and for each delay d ∈ R ≥0<br />

with<strong>in</strong> a lower and upper bound LB ≤ d ≤ UB after which an event a can<br />

occur <strong>in</strong>clude for every i ∈{LB, LB +1,...,UB} a transition from 〈s,ν〉 to<br />

〈s,ν⊕ i〉 <strong>in</strong>to the TTTS.<br />

(2) Dist<strong>in</strong>guish between <strong>in</strong>puts and outputs of the SUT: The set of network components<br />

can be partitioned <strong>in</strong>to automata specify<strong>in</strong>g the system under test S<br />

and automata describ<strong>in</strong>g the environment E of the SUT, with S ∩ E = ∅.<br />

Each transition (pi , a, r) of a TTS becomes <strong>in</strong> the TTTS (0, <strong>in</strong>p, a, r) if<br />

Ai ∈ E ,or(0, out, a, r) ifAi ∈ S respectively.<br />

(3) Dist<strong>in</strong>guish between visible and <strong>in</strong>visible actions: Visible events of a TTTS<br />

are def<strong>in</strong>ed by a test view V =(P ′ ⊆ P, Var ′ ⊆ Var , C ′ ⊆ C , Ch ′ ⊆ Ch). In<br />

the TTTS all a ∈ Ch\Ch ′ are replaced by τ. The reset set is reduced to only<br />

conta<strong>in</strong> resets for elements of s with p ∈ P ′ , for variables v ∈ Var ′ ,andfor<br />

clocks c ∈ C ′ . All states with equal values for visible variables are considered<br />

to belong to the same visible equivalence class (q =V q ′ def<br />

= ∀ pi ∈ P ′ ∀ v ∈<br />

(Var ′ ∪ C ′ ):ν(v) =ν ′ (v) ∧ s[i] =s ′ [i], with q =(s,ν)andq ′ =(s ′ ,ν ′ )).<br />

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