Lecture Notes in Computer Science 3472

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18 Run-Time Verification 531 Monitor [ML97] enables the specification of Real-time Logic [JG90] assertions. Assertion mechanisms have been defined also for other languages such as Eiffel [Mey92] (the language where assertions were originally introduced), C [TJ98] and Ada [SM93]. class MyClass { static void foo(int x) { /*TRBegin TRAssert{ Always{x < 0} } => {System.out.println("Violated the assertion x
532 Séverine Colin and Leonardo Mariani occur in the examined execution trace. The goal is to extract as much information as possible from a single execution trace to be able to forecast problems that can occur in executions that have not been explored. In the case of multi-threaded software, debugging is complex since execution of threads is not deterministic and many combinations are possible, thus verification requires specific tools. In this section, we present the application of run-time verification techniques for detecting data races and deadlocks. 18.4.1 Data Races The Eraser algorithm [SBN + 97] is one of the first algorithms that dynamically detects data races in multi-threaded programs. A date race occurs when two concurrent threads access a shared variable with at least one write access and threads use no explicit mechanism to prevent accesses from being simultaneous. The Eraser algorithm takes an unmodified program binary as input and adds instrumentation to produce a new binary that is functionally identical, but includes calls to the Eraser run-time which implements the Lockset algorithm. The Lockset algorithm enforces the locking discipline requiring that every variable shared between threads is protected by a mutual exclusion lock. As a consequence, the lock must be held by threads accessing the variable. Basically, Eraser instruments standard C, C++ and Unix memory allocation routines and monitors all read and write operations to check whether the program respects or not the locking policy. Eraser does not know which locks are intended to protect which variables, so it must infer the protection relation from the execution history. In particular, for each shared variable v, Eraser maintains the set C (v) of candidate locks for v. This set contains those locks that have protected v for the computation so far, that is, a lock l is in C (v) if in the current computation every thread that has accessed v was holding l at the moment of the access. When a new variable v is initialized, its candidate set C (v) is considered to hold all possible locks. When the variable is accessed, Eraser updates C (v) withthe intersection of C (v) and the set of locks held by the current thread. This process, called lockset refinement, ensures that anylockthatconsistentlyprotectsv is contained in C (v). If C (v) becomes empty, no locks consistently protect v. A lock is a simple synchronization object used to implement mutual exclusion. Locks can be either available or owned by a thread. The operations that can be performed on a lock mu are lock(mu) andunlock(mu). Figure 18.3 shows an example taken from the paper presenting the Eraser algorithm [SBN + 97] that illustrates how a potential data race is discovered through lockset refinement. The left column contains the program statements that are executed;the column in the middle contains the set of locks held by the considered thread; and the right column contains the set of candidate locks C (v). The example uses two locks mu1 and mu2, thusC (v) initially contains both of them. Then, the lock mu1 is acquired and v is accessed. Thus, C (v) is refined by computing the intersection of C (v) with the set of acquired locks. Later, v is accessed again, when only mu2 is held. The intersection of the singleton {mu1} with {mu2} is
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Lecture Notes in Computer Science 3
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Volume Editors Manfred Broy Martin
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VI Preface The last part of the boo
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VIII Contents 13 Real-Time and Hybr
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2 Part I. Testing of Finite State M
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1 Homing and Synchronizing Sequence
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s2 a/1 1 Homing and Synchronizing S
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1.3.2 Computing Synchronizing Seque
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A1 A2 Bad 1 Homing and Synchronizin
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36 Moez Krichen b/1 a/0 s1 b/1 a/1
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38 Moez Krichen Now, even for minim
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40 Moez Krichen the algorithms for
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42 Moez Krichen ∀ s, s ′ ∈ S
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44 Moez Krichen In this proposition
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46 Moez Krichen Proposition 2.6. If
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48 Moez Krichen Algorithm 5 Checkin
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50 Moez Krichen (5) Edges emanating
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52 Moez Krichen graph of this machi
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54 Moez Krichen v12 v6 v11 1 I = {s
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56 Moez Krichen B of π, a is a-val
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58 Moez Krichen I = {s1, s2, s3, s4
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60 Moez Krichen Definition 2.19. A
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62 Moez Krichen Algorithm 7 Computi
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64 Moez Krichen Algorithm 8 Computi
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66 Moez Krichen The two authors als
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3 State Verification Henrik Björkl
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a/1 s1 s3 b/1 a/1 b/1 a/0 s2 s4 3 S
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3 State Verification 73 Thus (s, Q)
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3 State Verification 75 0, and x ca
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s1 s3 a/0 b/0 a/1 s2 s4 3 State Ver
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3.4.2 Naik’s Algorithm 3 State Ve
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s1 s2 s3 s1 s3 s3 a/0 a/0 s1 s2 s3
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3 State Verification 83 Since the m
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3 State Verification 85 x = a1a2 ..
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4 Conformance Testing Angelo Gargan
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4 Conformance Testing 89 the test u
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4 Conformance Testing 91 state. For
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4 Conformance Testing 93 This check
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s1 s1 a b s2 s2 a b s3 4 Conformanc
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4 Conformance Testing 97 Using a Q
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4 Conformance Testing 99 this case
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4.4.5 Cost and Length 4 Conformance
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t τ (t,si−1) x τti−1 ,si si
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si 1 2 w1 t i w 2 3 a: in MS si 1 w
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4 Conformance Testing 107 ti = δ(s
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4 Conformance Testing 109 Example.
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4 Conformance Testing 111 • If on
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114 Part II. Testing of Labeled Tra
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5 Preorder Relations ∗ Stefan D.
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5 Preorder Relations 119 power of r
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5 Preorder Relations 121 To summari
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5 Preorder Relations 123 Two import
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∧ ⊥⊤ ⊥ ⊥⊥ ⊤ ⊥⊤
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5 Preorder Relations 127 Definition
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5 Preorder Relations 129 For one th
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5 Preorder Relations 131 We close t
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s a b t 5 Preorder Relations 133 y
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5 Preorder Relations 135 (1) p ⊑m
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a p ′ τ b p ′′ τ τ a a b 5
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5 Preorder Relations 139 It should
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coin coin e c coin coin τ 5 Preord
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5 Preorder Relations 143 for free.
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5 Preorder Relations 145 condition
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5 Preorder Relations 147 ⊑←→
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5 Preorder Relations 149 The utilit
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152 Valéry Tschaen The labels repr
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154 Valéry Tschaen Intuitively, th
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156 Valéry Tschaen Definition 6.2.
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158 Valéry Tschaen By this theorem
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160 Valéry Tschaen The test suite
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162 Valéry Tschaen each sequence (
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164 Valéry Tschaen and B2 are LOTO
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166 Valéry Tschaen 6.4.2 The CO-OP
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168 Valéry Tschaen a τ q0 τ τ q
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170 Valéry Tschaen Concerning the
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7 I/O-automata Based Testing Machie
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7 I/O-automata Based Testing 175 th
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7 I/O-automata Based Testing 177 in
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7 I/O-automata Based Testing 179 sp
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7 I/O-automata Based Testing 181 na
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7 I/O-automata Based Testing 183 Un
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7 I/O-automata Based Testing 185 We
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7 I/O-automata Based Testing 187 fa
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7 I/O-automata Based Testing 189 Th
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7 I/O-automata Based Testing 191 Ac
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7 I/O-automata Based Testing 193 vi
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7 I/O-automata Based Testing 195 De
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7 I/O-automata Based Testing 197 To
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7 I/O-automata Based Testing 199 In
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8 Test Derivation from Timed Automa
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s0 on, true, {c} off , c =5, ∅ 8
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8.3 Testing Event Recording Automat
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[s1, z], z = con < 5, 8 Test Deriva
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Ψ(S ′ )={PE ′ | E ′ ∈ 2E(S
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{s0}, p0 p0 : tt 8 Test Derivation
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s0 c = ∞ 8 Test Derivation from T
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Example. The Light Switch can be de
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��s0� ,c=0.0 s0 en, on, {c :=
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��s0� ,c=0 s0 8 Test Derivati
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234 Verena Wolf to probabilistic tr
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236 Verena Wolf • A finite trace
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238 Verena Wolf (a, 0.2) v1 sP (a,
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240 Verena Wolf 1 2 sP a b µ λ 1
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242 Verena Wolf (a, 1 4 ) (a, 1 4 )
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244 Verena Wolf 9.6 Test Processes
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246 Verena Wolf We present two appr
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248 Verena Wolf specification proce
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250 Verena Wolf sP (τ, 1 1 ) (c, 3
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252 Verena Wolf sP (a, 1 1 ) (a, 2
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254 Verena Wolf v1 u1 w1 1 2 sP λ
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256 Verena Wolf • P ⊑ must JY Q
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258 Verena Wolf u1 s M ′ 1 (a, r1
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260 Verena Wolf Proposition 9.22. L
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262 Verena Wolf Now let Q min be th
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264 Verena Wolf (8) (⊑BC , ⊑CH
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266 Verena Wolf is that an action a
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268 Verena Wolf can perform τ-tran
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270 Verena Wolf T np,re seq ⊑ tr
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272 Verena Wolf t2 t4 a sT t1 b b t
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274 Verena Wolf model test processe
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Part III Model-Based Test Case Gene
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Part III. Model-Based Test Case Gen
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282 Alexander Pretschner and Jan Ph
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11 Evaluating Coverage Based Testin
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12 Technology of Test-Case Generati
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Increment ∆Counter 12 Technology
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(12.4) ✟ nat(X ′ ) {A/0, B/X
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a: b: (6) α1+1−α2 α2 a: b: PC:
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12.5 Summary 12 Technology of Test-
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13 Real-Time and Hybrid Systems Tes
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Test Driver SUT 13 Real-Time and Hy
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fitness 13 Real-Time and Hybrid Sys
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13.5 Summary 13 Real-Time and Hybri
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390 Part IV. Tools and Case Studies
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392 Axel Belinfante, Lars Frantzen,
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440 Wolfgang Prenninger, Mohammad E
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Part V Standardized Test Notation a
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466 George Din inter-operability te
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468 George Din • Tabular Presenta
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470 George Din 16.3.1 Test Building
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472 George Din Abstract Test System
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474 George Din field can be marked
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476 George Din • omit: the value
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Page 481 and 482: 488 George Din hosts, of preparing
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Page 499 and 500: 506 Zhen Ru Dai 17.4 Test Developme
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Page 515 and 516: Part VI Beyond Testing This last pa
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Page 547 and 548: 19 Model Checking Therese Berg 1 an
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• SA ⊆ Σ ∗ is a nonempty fin
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19 Model Checking 585 When OT is cl
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19 Model Checking 587 • se = s
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19 Model Checking 589 the new colum
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19 Model Checking 591 Henceforth th
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19 Model Checking 593 DT , the tran
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19 Model Checking 595 queries. At t
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19 Model Checking 597 Assistant 4.
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19 Model Checking 599 have created
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19 Model Checking 601 Logic (see Se
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19 Model Checking 603 linear time l
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20 Model-Based Testing - A Glossary
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20 Model-Based Testing - A Glossary
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612 Bengt Jonsson a/0 b/0 b/1 s2 s4
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614 Bengt Jonsson of input symbols
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616 Joost-Pieter Katoen The followi
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618 Literature [AFH94] Rajeev Alur,
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620 Literature [BCMD90] J. R. Burch
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622 Literature [BRV95] Ed Brinksma,
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624 Literature [CL97a] Duncan Clark
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626 Literature [DGNP04] Z. R. Dai,
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628 Literature [FHP02] Eitan Farchi
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630 Literature [GL02] Hubert Garave
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632 Literature [Hib61] Thomas N. Hi
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634 Literature [HR01b] Klaus Havelu
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636 Literature [KKL + 01] M. Kim, S
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638 Literature [LPY97] Kim Guldstra
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640 Literature [Müh97] H. Mühlenb
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642 Literature [Pha93] M. Phalippou
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644 Literature [RdBJ00] V. Rusu, L.
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646 Literature [Sch00] Johann M. Sc
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648 Literature [SVG02] S. Schulz an
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650 Literature [Vas73] M. P. Vasile
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Index =⇒ , 175 ioco, 187 ioconf,
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homing sequence, 8 - adaptive, 8, 2
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eset sequence, see synchronizing se
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timed transition system, 223, 360,
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