7-2018

RF & Wireless
Introducing MIPS I7200 Processor Core
MIPS, provider of the widely
used MIPS processor architecture
and IP cores for licensing,
announced the I7200 multithreaded
multi-core processor, a
new high performance licensable
IP core in their midrange 32-bit
product lineup. Class-leading
efficiency is essential to power
sensitive applications such as the
high bandwidth modem subsystems
in Advanced LTE Pro and
upcoming 5G smartphone SoCs,
as well as networking ICs, and
other applications. The I7200
delivers 50% higher performance
in less than 20% area increase
than the previous generation
from MIPS.
Part of the MIPS 32-bit I-Class
family of processor cores, the
I7200 is built on MIPS’ multithreading
technology, which
delivers not only these higher
levels of performance efficiently,
but is a key mechanism supporting
very low latency response
to high priority events in realtime
embedded systems. These
characteristics, in combination
with the following deterministic
features available in the I7200,
make it the ideal processor for
embedded applications requiring
both high performance and fast
response to real-time events:
• Simultaneous multi-threading
with thread prioritization and
zero cycle context switching
• Configurable memory management
– options for full TLBbased
MMU or simpler, deterministic
32 region memory
protection unit (MPU)
• Tightly coupled, fast-access,
deterministic ScratchPad
RAMs (SPRAMs, up to 1 MB
each) for instructions, data for
each core, or unified implementations
Complementing the focus for use
in embedded real-time systems,
the I7200 is the first MIPS core
to use the nanoMIPS ISA, which
delivers industry-leading small
code size. nanoMIPS is a variable
instruction length ISA consisting
of 16/32/48-bit instructions
and numerous other optimizations
that complement goals
of delivering performance in
smallest code size. Using an
equivalent compiler and compile
flags the code size is up to 10%
smaller than alternative cores
competing in similar applications.
This reduces the overall
memory footprint for a system,
but is essential for high performance
communications and
real-time embedded systems,
as it maximizes the amount
of code that can be fit into the
fastest, local RAM arrays for
low latency, deterministic execution
of high priority events
and interrupts.
The production released version
of the IP core is available
immediately for licensing, and
the I7200 is gaining widespread
support among MIPS partners
and customers.
■ MIPS Computer Systems,
Inc.
www.mips.com
High Performance 2 GHz Sector Antennas for LTE Networks
KP Performance Antennas announced
that it has released a new line of highperformance,
2 GHz sector antennas for
use in WISP networks. KP’s new line of
LTE (Long Term Evolution) 2 GHz sector
antennas consists of three new models:
KP-2DP120S-45, a 14 dBi sector with
120° azimuth beamwidth, the KPPA-
2GHZDP60S-17-45, a 15.1 dBi sector
with a 60° azimuth beamwidth, and the
KPPA-2GHZDP90S-45 which provides
17 dBi of gain with a 90° azimuth beamwidth.
These 2 GHz sector antennas utilize
a ±45° slant dual polarization scheme
and are specially designed with optimized
front to back and side lobes that allow for
frequency reuse. These antennas feature
heavy-duty weatherized sector brackets,
select models also include jumper cables
and radio brackets. These LTE sector
antennas also deliver high-gain in a compact
shell for ease of deployment. All
models in this line operate in the popular
2.3 to 2.7 GHz frequency range and deliver
SWR from 1.3 to 2.
■ KP Performance Antennas
www.kpperformance.com
82 hf-praxis 7/2018