Xcell Journal Issue 78: Charge to Market with Xilinx 7 Series ...

TOOLS OF XCELLENCE
Figure 3 – Converter solution footprint comparison for a typical 4A case. The PowerSoC (left) has much smaller
input and output AC current loops and is 1/7 the size of the typical discrete implementation. The dotted yellow rectangle
in the photo at right demonstrates the size of the PowerSoC relative to a discrete DC/DC (dotted red line).
You can curb PCB ESL by using
smaller filter components (inductor
and capacitors) to reduce the length of
the PCB. Unfortunately, the smaller
inductor will generally result in higher
ripple currents without increasing
switching frequency.
Another possibility is to use second-stage
filtering, such as placing a
ferrite bead and capacitor between
the DC/DC output filter section and
the target load. The disadvantage of
this approach is that the additional
lossy element will affect regulation
and could decrease efficiency.
INPUT VOLTAGE RIPPLE
As the SW1 MOSFET opens and closes,
current flows from the source
(VIN) with a near-rectangular pulsed
waveform. The rise and fall times can
be very fast, on the order of a very
few nanoseconds.
Much in the same way that the output
ripple arises from the ESR and ESL
of the output filter capacitor and PCB
trace ESL, the input ripple results from
the input filter capacitor’s ESR and
ESL, along with the ESL of the supply
PCB trace. However, the magnitude of
the input current ripple is much larger,
with large changes in current vs. time
(di/dt). Therefore, the impact of PCB
inductance is much more important
and the input filter capacitor must tolerate
higher RMS currents. This high, fast
switching current is also the primary
source of conducted and radiated EMI.
As with the output filter capacitor,
operating at a higher switching frequency
allows the use of smaller,
lower-ESR/ESL ceramic input filter
capacitors. The same cautions apply
with regard to higher switching losses.
One mitigation strategy is to minimize
parasitic inductances in the input
filter loop. The primary way to accomplish
this is to place the filter capacitor
as close to the DC/DC as possible and
make the PCB traces as short and wide
as possible. You should generally not
place the input filter capacitor on the
opposite side of the PCB and connect
it to the DC/DC using vias. This will
introduce a large amount of inductance
in the current loop.
RADIATED EMI
Radiated EMI results from the high,
fast switching currents flowing
through the input AC current loop.
Recall from your electromagneticfields
courses that the radiation efficiency
of a loop antenna is a function
of the loop radius relative to the radiation
wavelength.
The equation gives the power radiated
by a loop antenna of radius r and
wavelength λ; η is a free-space constant.
Note that there is an r 8 relationship with
loop radius while the wavelength has a
λ 4 relationship. Hence, there is a significant
advantage in operating at higher
frequencies if it allows you to use smaller
components that result in a smaller
input current loop radius.
The best mitigation strategy for radiated
EMI is to reduce the radius of the
input AC current loop. You can do so
by switching at higher frequencies that
enable the use of smaller ceramic filter
capacitors. The same caveat regarding
higher switching frequency applies
here—namely, higher switch loss.
CONDUCTED EMI
Conducted EMI comes from two primary
sources. The first is from the fast
switching input currents being pulled
60 Xcell Journal First Quarter 2012