BLOCKING READER: DESIGN AND IMPLEMENTATION OF A ...

The transceiver Pin Configuration is shown in the Figure 6.1. Description of
some important pins of the chip are
• SCLK: It is a digital input for serial configuration interface, clock input.
• S0(GDO1): It is a digital output for serial configuration interface, data output.
and can be used as optional output pin when CSn is high.
• GDO2: Its is a digital output pin generally used for test signals, FIFO status
signals, clear channel indicator, clock output, down-divided from XOSC and
serial output RX data
• GDO0(ATEST): It is a digital I/O pin. Generally used for outputting test
signals, FIFO status signals, clear channel indicator, clock output, down-divided
from XOSC and serial RX/TX data.
• CSn: It is a digital input used for chip selection and serial configuration inter-
face.
• RF P: It is an RF I/O pin, a positive terminal for RF I/P signal to LNA and
O/P signal from PA.
• RF N: It is an RF I/O pin, a negative terminal for RF I/P signal to LNA and
O/P signal from PA.
• SI: It is a digital input for serial configuration interface.
58