Request

2
6
5
4
e500mc Core
Completion
Queue
7
Internal
Completion
w/bad data
UR Cpl
CoreNet
PCIe
Root
Complex
1 Load
Instruction
Load Queue
PCIe Endpoint
TM
3
MRd
P4080
1. P4080 host software issues a load instruction via core
targeting a PCI Express downstream EP
2. The load instruction is decoded and dispatched to
issue queue. It will then be tracked at completion
queue.
3. The load instruction is converted to an outbound MRd
transaction and passed down through CoreNet, OCN,
PCI Express RC, which will convert it into a PCI
Express MRd transaction and send through link to
reach the downstream EP.
4. The downstream EP for some reason can’t handle the
MRd. It then returns a Completion TLP w/status as
“Unsupported Request”.
5. PCI Express RC terminates this MRd transaction
locally and return the status marked as “bad data”.
6. Core noticed the result of this transaction marked with
“bad data”. Meanwhile, the load instruction reaches the
bottom of the completion queue, which expects correct
return data before it can complete/finish the instruction.
7. The core can’t complete this load instruction normally!!!
33
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