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MPIC Error Interrupt Summary Register 0 (EISR0) Offset 0x4_3900<br />
FMAN2<br />
FMAN1<br />
BMAN<br />
QMAN<br />
PME<br />
SRIO<br />
PEX3<br />
PEX2<br />
PEX1<br />
eLBC<br />
DDR MC2<br />
DDR MC1<br />
CPC2<br />
CPC1<br />
Int RAM ECC<br />
PAMU<br />
CoreNet<br />
TM<br />
May only select 1<br />
of 3 destinations<br />
mcp<br />
int<br />
cint<br />
IVPR + IVOR1<br />
IVPR + IVOR4<br />
IVPR + IVOR0<br />
48<br />
Machine Check ISR<br />
External Input ISR<br />
Critical Input ISR<br />
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mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc.,<br />
Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine,<br />
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other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc.