Errata Sheet - Infineon
Errata Sheet - Infineon
Errata Sheet - Infineon
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Workaround<br />
<strong>Errata</strong> <strong>Sheet</strong><br />
Functional Deviations<br />
Insert one NOP instruction between the MUL/MADD/MSUB/RSTV instruction<br />
and the MTCR instruction updating the PSW.<br />
...<br />
rstv<br />
nop<br />
mtcr #PSW, dY ; Modify PSW<br />
...<br />
CPU_TC.107 SYSCON.FCDSF may not be set after FCD Trap<br />
Under certain conditions the SYSCON.FCDSF flag may not be set after an FCD<br />
trap is entered. This situation may occur when the CSA (Context Save Area) list<br />
is located in cacheable memory, or, dependent upon the state of the upper<br />
context shadow registers, when the CSA list is located in LDRAM.<br />
The SYSCON.FCDSF flag may be used by other trap handlers, typically those<br />
for asynchronous traps, to determine if an FCD trap handler was in progress<br />
when the another trap was taken.<br />
Workaround<br />
In the case where the CSA list is statically located in memory, asynchronous<br />
trap handlers may detect that an FCD trap was in progress by comparing the<br />
current values of FCX and LCX, thus achieving similar functionality to the<br />
SYSCON.FCDSF flag.<br />
In the case where the CSA list is dynamically managed, no reliable workaround<br />
is possible.<br />
CPU_TC.108 Incorrect Data Size for Circular Addressing mode instructions<br />
with wrap-around<br />
In certain situations where a Load or Store instruction using circular addressing<br />
mode encounters the circular buffer wrap-around condition, the first access to<br />
the circular buffer may be performed using an incorrect data size, causing too<br />
many or too few data bytes to be transferred. The circular buffer wrap-around<br />
TC1767, EES-AD, ES-AD, AD 12/73 Rel. 1.4, 11.12.2009
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