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Errata Sheet - Infineon

Errata Sheet - Infineon

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<strong>Errata</strong> <strong>Sheet</strong><br />

Functional Deviations<br />

ld.w d0, [a1] ;; This load will be executed fresh from<br />

memory with a refill.<br />

;; Read data will be coherent with rest<br />

of memory.<br />

FADC_TC.005 Equidistant multiple channel-timers<br />

The description is an example for timer_1 and timer_2, but can also affect all<br />

other combinations of timers.<br />

Timer_1 and Timer_2 are running with different reload-values. Both timers<br />

should start conversions with the requirement of equidistant timing.<br />

Problem description:<br />

Timer_1 becomes zero and starts a conversion. Timer_2 becomes zero during<br />

this conversion is running and sets the conversion-request-bit of channel_2. At<br />

the end of the conversion for channel_1 this request initiates a start for<br />

channel_2. But the Timer_2 is reloaded only when setting the request-bit for<br />

channel_2 and is decremented during the conversion of channel_1.<br />

The correct behavior would be a reload when the requested conversion (of<br />

channel_2) is started.<br />

Therefore the start of conversion for channel_2 is delayed by maximum one<br />

conversion-time. After this delay it will be continued with equidistant conversionstarts.<br />

Please refer to the following figure.<br />

TC1767, EES-AD, ES-AD, AD 34/73 Rel. 1.4, 11.12.2009

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