Serial Programming - upload.wikimedia....

8250 UART Programming
LCR_Offset = $03;
Latch_Low = $00;
Latch_High = $01;
procedure SetBaudRate(NewRate: Word);
var
DivisorLatch: Word;
begin
DivisorLatch := 115200 div NewRate;
Port[COM1_Base + LCR_Offset] := Port[COM1_Base + LCR_Offset] or
$80; {Set DLAB}
Port[COM1_Base + Latch_High] := DivisorLatch shr 8;
Port[COM1_Base + Latch_Low] := DivisorLatch and $FF;
Port[COM1_Base + LCR_Offset] := Port[COM1_Base + LCR_Offset] and
$7F; {Clear DLAB}
end;
function GetBaudRate: Integer;
var
DivisorLatch: Word;
begin
Port[COM1_Base + LCR_Offset] := Port[COM1_Base + LCR_Offset] or
$80; {Set DLAB}
DivisorLatch := (Port[COM1_Base + Latch_High] shl 8) +
Port[COM1_Base + Latch_Low];
Port[COM1_Base + LCR_Offset] := Port[COM1_Base + LCR_Offset] and
$7F; {Clear DLAB}
Result := 115200 div DivisorLatch;
end;
3.6.3 Interrupt Enable Register
Offset: +1 . This register allows you to control when and how the UART is going to trigger
an interrupt event with the hardware interrupt associated with the serial COM port. If
used properly, this can enable an efficient use of system resources and allow you to react
to information being sent across a serial data line in essentially real-time conditions. Some
more on that will be covered later, but the point here is that you can use the UART to let
you know exactly when you need to extract some data. This register has both read- and
write-access.
The following is a table showing each bit in this register and what events that it will enable
to allow you check on the status of this chip:
Interrupt Enable Register (IER)
Bit Notes
7 Reserved
6 Reserved
5 Enables Low Power Mode (16750)
4 Enables Sleep Mode (16750)
3 Enable Modem Status Interrupt
2 Enable Receiver Line Status Interrupt
1 Enable Transmitter Holding Register Empty Interrupt
0 Enable Received Data Available Interrupt
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